Functional Details; Signal Level Control - Measurement Computing CIO-DIO96 User Manual

Digital input/output board, 96 digital i/o bits, ttl level, four 82c55 chips
Table of Contents

Advertisement

Functional Details

Signal level control

The digital I/O bits on the CIO-DIO96 are 8255 CMOS TTL. The 82C55 digital I/O chip initializes all ports as
inputs on power- up and reset. A TTL input is a high impedance input. If you connect another TTL input device
to the 82C55 it could be turned ON or OFF every time the 82C55 is reset.
All I/O bits are set to input mode on power up and reset. If you are using the board to control items that must be
OFF on reset, install pull-down resistors. The CIO-DIO96 has open locations where you can install Single
Inline Packages (SIP) resistor networks in either pull-up or pull-down configurations.
You can install pull-up and pull-down resistor SIP packs at each port. The positions are labeled
on the board. When installed, the SIP establishes either a high or low logic level at each of the I/O lines on
RN6
the port.
To safeguard against unwanted signal levels, the devices being controlled by the CIO-DIO96 board should be
tied low or high as required by a 2.2K Ω resistor. In a 2.2K eight-resistor SIP pack, one side of all of the
resistors is connected to a single common point and brought out to a pin. The common line, usually marked
with a dot or line, is at one end of the SIP. The remaining resistor ends are brought out to the other eight pins
(refer to Figure 5).
Figure 6
shows a schematic of an SIP installed in both the pull-up and pull-down positions. Each port provides
10 holes in a line. The end labeled
in the middle (n0 –n7) connect to the eight lines of the Port, A, B or C.
Digital
n = A, B, or C
Dot indicates the
common line
(LO or HI)
Figure 5. Eight-resistor SIP schematic
connects to +5V. The end marked
HI
+5 VDC
Dot
2.2 K SIP
COM
HI
n7
n6
n5
n4
I/O
Port
n3
n2
n1
n0
LO
(GND)
2.2 K SIP installed for pull-up
Figure 6. Pull-up and pull-down resistor SIPs schematic
2.2KOhm SIP
I/O Lines
connects to GND. The eight holes
LO
+5 VDC
2.2 K SIP
HI
n7
n6
n5
Digital
n4
I/O
Port
n3
n2
n = A, B, or C
n1
n0
COM
LO
(GND)
2.2 K SIP installed for pull-down
14
Chapter 3
through
RN1
Dot

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the CIO-DIO96 and is the answer not in the manual?

Questions and answers

Table of Contents