Default Operation And Jumper Selection Settings - Analog Devices UG-200 User Manual

Evaluation Board User Guide
DEFAULT OPERATION AND
JUMPER SELECTION SETTINGS
This section explains the default and optional settings or modes
allowed on the evaluation board for the AD9467.
Power Circuitry
Connect the switching power supply that is supplied in the
evaluation kit between a rated 100 V ac to 240 V ac wall outlet
at 47 Hz to 63 Hz and P700.
Analog Input Front-End Circuit
The evaluation board is set up for single-ended analog input
connection with an optimum 50 Ω impedance match of
350 MHz of bandwidth. For a different bandwidth response,
the input network needs to be changed or modified.
XVREF
XVREF is set to 1.25 V. This causes the ADC to operate with
the default internal reference in the 2.5 V p-p full-scale range.
A separate external reference option using the
included on the evaluation board. Populate R400 with a 0 Ω
resistor. Note that ADC full-scale ranges from 2.0 V p-p to
2.5 V p-p are supported by the AD9467.
Clock Circuitry
The default clock input circuitry is derived from a simple
transformer-coupled circuit using a high bandwidth 1:1
impedance ratio transformer (T201) that adds a very low amount
of jitter to the clock path. The clock input is 50 Ω terminated
and ac-coupled to handle single-ended sine wave types of inputs.
The transformer converts the single-ended input to a differential
signal that is clipped before entering the ADC clock inputs.
The evaluation board can be set up to be clocked from the
crystal oscillator, Y200. This oscillator is a low phase noise
oscillator from Vectron (VCC6-QCD-250M000). If this clock
source is desired, install C205 and C206 and remove C202. Jumper
P200 is used to disable the oscillator from running.
A differential LVPECL or LVDS clock driver can also be used to
clock the ADC input using the
C305, C306, and C307 with 0.1 µF capacitors for one drive option
or the other and remove C209 and C210 to disconnect the default
clock path inputs. The AD9517 has many SPI-selectable options
ADR130 is also
that are set to a default mode of operation. Consult the AD9517
data sheet for more information about these and other options.
Dx+, Dx−
If an alternative data capture method to the setup shown in
Figure 2 is used, optional receiver terminations, R500 to R509, can
be installed next to the high speed backplane connector, P502.
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UG-200
AD9517 (U300). Populate C304,