Figure 18: Reference Circuit With Translator Chip - Quectel UC20 Manual

VDD_EXT
RI
DCD
CTS
RTS
DTR
TXD
RXD
Please visit http://www.ti.com for more information.
Another example with transistor translation circuit is shown as below. The construction of dotted line can
refer to the construction of solid line. Please pay attention to direction of connection. Input dotted line of
module should refer to input solid line of the module. Output dotted line of module should refer to output
solid line of the module.
MCU/ARM
The following figure is an example of connection between UC20 and PC. A voltage level translator and a
RS-232 level translator chip must be inserted between module and PC, since these two UART interfaces
do not support the RS-232 level, while support the 1.8V CMOS level only.
UC20_Hardware_Design
VCCA
0.1uF
OE
A1
A2
TXB0108PWR
A3
A4
A5
A6
A7
51K
A8

Figure 18: Reference Circuit with Translator Chip

VCC_MCU
/TXD
/RXD
4.7K
VCC_MCU
/RTS
/CTS
GPIO
EINT
GPIO
GND
Figure 19: Reference Circuit with Transistor Circuit
VCCB
GND
B1
B2
B3
B4
B5
B6
B7
B8
4.7K
VDD_EXT
4.7K
4.7K
4.7K
VDD_EXT
Confidential / Released
UMTS/HSPA Module Series
UC20 Hardware Design
VDD_3.3V
0.1uF
RI_3.3V
DCD_3.3V
CTS_3.3V
RTS_3.3V
DTR_3.3V
TXD_3.3V
RXD_3.3V
51K
Module
RXD
TXD
RTS
CTS
DTR
RI
DCD
GND
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