Quectel UC20 Manual page 24

RXD 68
Debug UART Interface
Pin Name Pin No.
DBG_TXD 12
DBG_RXD 11
RF Interface
Pin Name Pin No.
ANT_DIV 35
ANT_MAIN 49
ANT_GNSS 47
PCM Interface
Pin Name Pin No.
PCM_IN 24
PCM_OUT 25
PCM_SYNC 26
PCM_CLK 27
UC20_Hardware_Design
DI Receive data.
I/O Description
DO Transmit data.
DI Receive data.
I/O Description
AI Diversity antenna.
IO Main antenna.
AI GNNS antenna.
I/O Description
DI PCM data input.
DO PCM data output.
PCM data frame
IO
sync signal.
IO PCM data bit clock.
Confidential / Released
UMTS/HSPA Module Series
UC20 Hardware Design
V min = -0.3V
IL
V max = 0.6V
IL
V min = 1.2V
IH
V max = 2.0V
IH
DC Characteristics
V max = 0.45V
OL
V min = 1.35V
OH
V min = -0.3V
IL
V max = 0.6V
IL
V min = 1.2V
IH
V max = 2.0V
IH
DC Characteristics
50Ω impedance
50Ω impedance
50Ω impedance
DC Characteristics
V min = -0.3V
IL
V max = 0.6V
IL
V min = 1.2V
IH
V max = 2.0V
IH
V max = 0.45V
OL
V min = 1.35V
OH
V max = 0.45V
OL
V min = 1.35V
OH
V min = -0.3V
IL
V max = 0.6V
IL
V min = 1.2V
IH
V max = 2.0V
IH
V max = 0.45V
OL
V min = 1.35V
OH
V min = -0.3V
IL
V max = 0.6V
IL
V min = 1.2V
IH
V max = 2.0V
IH
1.8V power domain.
Comment
1.8V power domain.
1.8V power domain.
Comment
Comment
1.8V power domain.
1.8V power domain.
1.8V power domain.
In master mode, it is
an output signal. In
slave mode, it is an
input signal.
1.8V power domain.
In master mode, it's
an output signal. In
slave mode, it is an
input signal.
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