Synchronization Status Messages (Ssm); Ds1 Signals; E1 Signals; Table 31: Local Clock Parameters When Profile Is Set To: Itu-Telecom-Freq - Alcatel-Lucent 7450 ESS-12 Configuration Manual

Os basic system 7450 ess series ethernet service switch
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Synchronization Status Messages (SSM)

SSM provides a mechanism to allow the synchronization distribution network to both determine
the quality level of the clock sourcing a given synchronisation trail and to allow a network element
to select the best of multiple input synchronization trails. Synchronization Status messages have
been defined for various transport protocols including SONET/SDH, T1/E1, and Synchronous
Ethernet, for interaction with office clocks, such as BITS or SSUs and embedded network element
clocks.
SSM allows equipment to autonomously provision and reconfigure (by reference switching) their
synchronization references, while helping to avoid the creation of timing loops. These messages
are particularly useful to allow synchronization reconfigurations when timing is distributed in both
directions around a ring.

DS1 Signals

DS1 signals can carry an indication of the quality level of the source generating the timing
information using the SSM transported within the 1544 Kbit/s signal's Extended Super Frame
(ESF) Data Link (DL) as specified in Recommendation G.704. No such provision is extended to
SF formatted DS1 signals.
The format of the data link messages in ESF frame format is "0xxx xxx0 1111 1111", transmitted
rightmost bit first. The six bits denoted "xxx xxx" contain the actual message; some of these
messages are reserved for synchronization messaging. It takes 32 frames (such as 4 ms) to transmit
all 16 bits of a complete DL.

E1 Signals

E1 signals can carry an indication of the quality level of the source generating the timing
information using the SSM as specified in Recommendation G.704.
One of the Sa4 to Sa8 bits, (the actual Sa bit is for operator selection), is allocated for
Synchronization Status Messages. To prevent ambiguities in pattern recognition, it is necessary to
align the first bit (San1) with frame 1 of a G.704 E1 multiframe.
The numbering of the San (n = 4, 5, 6, 7, 8) bits. A San bit is organized as a 4-bit nibble San1 to
San4. San1 is the most significant bit; San4 is the least significant bit.
The message set in San1 to San4 is a copy of the set defined in SDH bits 5 to 8 of byte S1.
Page 234
7450 ESS OS Basic System Configuration Guide

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