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Ca r r i e r Board
Speaker signal output.
RING#
This input signal is asserted to wake up the system from low
power state. The input source of this signal are RI signal of
COM port and LWAKE signal of LAN.
GPIO1 (GPIOD)
General purpose I/O 1. Currently is defined as output.
CPUFAN/NC
CPU fan frequency detection or NC.
Default is CPUFAN. (Set JP20 1-2 ON)
ROMCS#
BIOS ROM chip select output. This pin D11 is connected to
IRQ1 in schematics, but is not support by ETX module.
SMALRT#/CPUFAN
SM bus alert signal or fan frequency input (CPUFAN). This
signal is not implemented on this carrier board.
Default is left as no connection (Set JP21 1-2 OFF).
I2CLK (SMBCLK)
I2C clock signal.
I2DAT (SMBDATA)
I2C data signal..
SMCLK (SMBCLK)
SM bus clock signal.
SMDAT (SMBDATA)
SM bus data signal.
Quick Installation Guide - 46 -
E C B - 9 0 1 A
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