Video Interface - Epson EPL-5500 Service Manual

EPL-5500 Service Manual Operating Principles

2.2.1.6 Video Interface

The ASIC E05A92 maps the SRAM into a memory space different from the system memory. The
CPU transmits data from the V-RAM (in the system RAM) to the SRAM using the ASIC E05A92.
The ASIC cell converts the image data in the SRAM from parallel to serial, synchronizes it, and then
transmits it to the engine controller board. In other words, the SRAM is a temporary buffer used to
transmit the image data to the engine controller board. This serial image data is called the VIDEO
signal of video interface.
The signal line of the internal video interface circuit (the C125 MAIN board and engine controller
board) can be broadly divided into four groups. The first group (PRINT, CPRDY, EPRDY, and
PRDY) gives the status of either the video controller or engine controller and indicates whether they
are ready to communicate with each other or ready to start the printing operation. The second
group (VSYNC, HSYNC) is the synchronizing signal for the printing operation. The third group
(VIDEO) is the serial video data signal. The fourth group (CMD, SRCLK, CTBSY, and ETBSY) is
used to transfer the commands (from the video controller) or the status (from the engine controller)
for printer mechanism control. Except for VIDEO, PRINT, VSINC, and HSYNC, all signals are
controlled by ASIC E05A93.
This printer has BiRITech and EMGTech functions standard. These functions modify the VIDEO
signal with the ASIC E05A92.
Rev. B 2-23