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This user's guide contains support documentation for the DUAL-DIYAMP Evaluation Module (EVM).
Included is a description of how to set up and configure the EVM, printed circuit board (PCB) layout,
schematic, and bill of materials (BOM) of the DUAL-DIYAMP-EVM.
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SBOU193 - July 2017
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Copyright © 2017, Texas Instruments Incorporated
DUAL-DIYAMP-EVM
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User's Guide
SBOU193 - July 2017
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DUAL-DIYAMP-EVM
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Summary of Contents for Texas Instruments DUAL-DIYAMP-EVM
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Page 1: Table Of Contents
This user's guide contains support documentation for the DUAL-DIYAMP Evaluation Module (EVM). Included is a description of how to set up and configure the EVM, printed circuit board (PCB) layout, schematic, and bill of materials (BOM) of the DUAL-DIYAMP-EVM. Contents ........................ - Page 2 ..................DUAL-DIYAMP-EVM Kit Contents ..................Circuit Configuration Location Legend .................. MFB Filter Type Component Selection ................Sallen-Key Filter Component Type Selection ................... DUAL-DIYAMP-EVM Bill of Materials DUAL-DIYAMP-EVM SBOU193 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...
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Page 3: Introduction
All other trademarks are the property of their respective owners. Introduction The DUAL-DIYAMP-EVM is an EVM developed for dual package op amps to give users the ability to easily evaluate amplifier circuits. This “break apart” EVM has several popular op-amp configurations including amplifiers, filters, stability compensation, and other signal conditioning circuits that require two amplifiers. -
Page 4: Evm Circuit Locations
2 Op Amp INA Single-ended input to differential output SE to Diff Parallel op amps Parallel Op Amps Differential input to differential output Diff In Diff Out DUAL-DIYAMP-EVM SBOU193 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 5: Evm Assembly Instructions
Figure 4. Terminal Strip (TS-132-G-AA) Broken Into 4-Pin Lengths 5. Insert header strips into a spare DIP socket as shown in Figure Figure 5. 4-Pin Length Terminal Strips Inserted in DIP Socket SBOU193 – July 2017 DUAL-DIYAMP-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 6: Schematic And Pcb Layout
Each circuit board has the schematic of the circuit in silk screen located on the back of the PCB for easy reference. Figure 8 displays an example of a schematic on the back of the PCB. Figure 8. Silk Screen Schematic DUAL-DIYAMP-EVM SBOU193 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 7: Non-Inverting Amplifier
B are used to set the dc biasing of the circuit. The dc bias voltage is typically set to one half of the supply voltage of the amplifier. SBOU193 – July 2017 DUAL-DIYAMP-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 8: Inverting Amplifier
The inverting amplifier circuit configuration provides the option to ac couple the input, filter the output, and bias the output of the amplifier to a desired value. DUAL-DIYAMP-EVM SBOU193 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 9: Inverting Amplifier Top Layer Pcb Layout
´ 5/10 Figure 12 displays the PCB layout of the top layer of the inverting amplifier circuit configuration. Figure 12. Inverting Amplifier Top Layer PCB Layout SBOU193 – July 2017 DUAL-DIYAMP-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 10: Difference Amplifier With Reference Buffer
Capacitors C1 and C4 provide the option to filter the output of the amplifier. Equation 12 calculates the cut-off frequency of the filter. ´ p ´ ´ where • • • (12) DUAL-DIYAMP-EVM SBOU193 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 11: Multiple Feedback Active Filter
Component (Z3/8) Component (Z4/9) Component (Z5/10) Low Pass R1/6 C2/7 R3/8 R4/9 C5/10 High Pass C1/6 R2/7 C3/8 C4/9 R5/10 Band Pass R1/6 R2/7 C3/8 C4/9 R5/10 SBOU193 – July 2017 DUAL-DIYAMP-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 12: Sallen-Key Filter
Component (Z4/11) Component (Z5/12) Low Pass R1/8 R2/9 C3/10 Not Populated C5/12 High Pass C1/8 C2/9 R3/10 Not Populated R5/12 Band Pass R1/8 C2/9 R3/10 C4/11 R5/12 DUAL-DIYAMP-EVM SBOU193 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 13: Riso With Dual-Feedback
Refer to the Precision Labs - Op Amps: Stability 5 video for detailed information on this technique. SBOU193 – July 2017 DUAL-DIYAMP-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 14: Two Op-Amp Instrumentation Amplifier
(CMRR) as the three op-amp instrumentation amplifier topology, the two op-amp instrumentation requires only two op amps, thereby reducing cost. DUAL-DIYAMP-EVM SBOU193 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 15: Two Op-Amp Instrumentation Amplifier Top Layer Pcb Layout
PCB layout of the top layer of the two op-amp instrumentation amplifier circuit configuration. Figure 22. Two Op-Amp Instrumentation Amplifier Top Layer PCB Layout SBOU193 – July 2017 DUAL-DIYAMP-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 16: Single-Ended Input To Differential Output
PCB layout of the top layer of the single-ended input to differential output circuit configuration. Figure 24. Single-Ended Input to Differential Output Top Layer PCB Layout DUAL-DIYAMP-EVM SBOU193 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 17: 3.10 Parallel Op Amps
Populating C5 ac couples the input of the circuit. Equation 21 calculates the corner frequency of the high- pass filter created by C5 and R6. ´ p ´ ´ (21) SBOU193 – July 2017 DUAL-DIYAMP-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 18: 3.11 Differential Input To Differential Output
Figure æ ö ç ÷ VOUT VOUT VOUT è ø (23) DUAL-DIYAMP-EVM SBOU193 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 19: Connections
The SMA recommended for this board is TE Connectivity part number 5-1814400-1. Figure 29 shows SMA vertical connectors attached to both the input and output terminal. Figure 29. SMA Vertical Connectors SBOU193 – July 2017 DUAL-DIYAMP-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 20: Sma Horizontal Connectors
Figure 31. Wire Connections Figure 32 shows a through-hole test point connector attached to the output and Vref terminal. Figure 32. Through-Hole Test Points DUAL-DIYAMP-EVM SBOU193 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 21: Input And Output Labeled As Ina, Inb And Outa And Outb
Depending on the circuit, only one input and output may be available. In that case the input and output is labeled Vin and Vout, respectively. Input Output Figure 34. Input and Output Labeled as Vin and Vout SBOU193 – July 2017 DUAL-DIYAMP-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 22: Power
Figure 35. Wire Alternative for Terminal Area Bill of Materials and References This section lists the bill of materials and reference documents. Bill of Materials Table 5 displays the EVM bill of materials. Table 5. DUAL-DIYAMP-EVM Bill of Materials Designator Description Part Number Manufacturer Printed-circuit board... - Page 23 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
- Page 24 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
- Page 25 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/ /www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 3.4 European Union 3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a low-voltage power-supply network that supplies buildings used for domestic purposes.
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Page 26: Copyright © 2017, Texas Instruments Incorporated
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2017, Texas Instruments Incorporated... - Page 27 IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products;...
- Page 28 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments DUAL-DIYAMP-EVM...
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