Crc-16 Algorithm - GE 489 Communications Manual

CG.1.5 CRC-16 Algorithm
489 GENERATOR MANAGEMENT RELAY – COMMUNICATIONS GUIDE
• DATA BYTES: This is a variable number of bytes depending on the Function Code.
These may be actual values, setpoints, or addresses sent by the master to the slave or
vice-versa. Data is sent MSByte first followed by the LSByte.
• CRC: This is a two byte error checking code. CRC is sent LSByte first followed by the
MSByte. The RTU version of Modbus includes a two byte CRC-16 (16-bit cyclic
redundancy check) with every transmission. The CRC-16 algorithm essentially treats
the entire data stream (data bits only; start, stop and parity ignored) as one
continuous binary number. This number is first shifted left 16 bits and then divided by
a characteristic polynomial (11000000000000101B). The 16-bit remainder of the
division is appended to the end of the transmission, LSByte first. The resulting
message including CRC, when divided by the same polynomial at the receiver will give
a zero remainder if no transmission errors have occurred.
If a 489 Modbus slave device receives a transmission in which an error is indicated by the
CRC-16 calculation, the slave device will not respond to the transmission. A CRC-16 error
indicates than one or more bytes of the transmission were received incorrectly and thus
the entire transmission should be ignored in order to avoid the 489 performing any
incorrect operation. The CRC-16 calculation is an industry standard method used for error
detection. An algorithm is included here to assist programmers in situations where no
standard CRC-16 calculation routines are available.
Once the following algorithm is complete, the working register "A" will contain the CRC
value to be transmitted. Note that this algorithm requires the characteristic polynomial to
be reverse bit ordered. The MSbit of the characteristic polynomial is dropped since it does
not affect the value of the remainder.
The symbols used in the algorithm are shown below:
--> data transfer
A A ; A 16-bit working register; low and high order bytes of A (the 16-bit working
;
low high
register)
CRC 16 bit CRC-16 result
i, j loop counters
(+) logical EXCLUSIVE-OR operator
N total number of data bytes
D i-th data byte (i = 0 to N – 1)
i
G 16 bit characteristic polynomial = 1010000000000001 (binary) with
MSbit dropped and bit order reversed
shr (x) right shift operator (the LSbit of x is shifted into a carry flag, a '0' is
shifted into the MSbit of x, all other bits are shifted right one location)
The CRC algorithm is shown below:
1. FFFF (hex) --> A
2. 0 --> i
3. 0 --> j
4. D (+) A --> A
i low low
3