Mitsubishi MELSEC-Q Series Programming Manual page 97

4 SFC PROGRAM CONFIGURATION
Name
SET
Step START
instruction
SET
RST
RST
Step END
instruction
SCHG
SET
SET
Transition control
instruction
RST
RST
Block switching
BRSET
instruction
1: In a sequence program, block 0 is the instruction execution target block.
In an SFC program, the current block is the instruction execution target block.
The instruction execution target block can be changed with the block switching instruction
(BRSET).
Note, however, that the following CPU modules cannot use the BRSET instruction.
• Basic model QCPU
• Universal model QCPU whose serial number (first five digits) is "13101" or earlier
• LCPU
2: Can be used at the step of an SFC program.
An error occurs if it is executed in a sequence program other than an SFC program.
3: The Universal model QCPU whose serial number (first five digits) is "13102" or later can
execute this instruction.
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Ladder Expression
1 • A specified block is forcibly started
Sn
BLm\Sn
Sn 1 • A specified step in a specified block is
BLm/Sn
D 2
TRn 1 • A specified transition condition at a
BLm\TRn
1 • The forced transition at a specified
TRn
BLm\TRn
S
Function
(activated) independently and is
executed from a specified step.
forcibly ended (deactivated).
• The instruction execution step is
deactivated, and a specified step is
activated.
specified block is forcibly satisfied.
transition condition in a specified block is
canceled.
• Blocks subject to the "*1" SFC control
instruction are designated.
CPU Module Type
High
Performance
Universal
Basic Model QCPU,
model
model Process CPU,
QCPU,
QCPU Redundant
LCPU
CPU,
QnACPU
: Usable, : Unusable
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