Bar 0 (Mmio); Interrupt And Initialize Control/Status Registers - ICP DAS USA PCIe-8620 User Manual

High-speed Multifunction Boards
6.3

Bar 0 (MMIO)

6.3.1 Interrupt and Initialize Control/Status Registers

Register 0-1 Base+0x18 Interrupt Control/Status
Bit
Enable Interrupt. Write a 1 enables interrupt when DMA done
0
or FIFO level trigger.
1 Interrupt Status. Reading a 1 indicates an interrupt is complete.
Set Interrupt Mode. Write a 1 enables DMA down interrupt.
2
Write a 0 enable FIFO level trigger.
3 1
FIFO Trigger Level. Write a 0 indicates 32, write a 1 indicates 64,
write a 2 indicates 128, write a 3 indicates 256, write a 4
4:7
indicates 512, write a 5 indicates 1024, write a 6 is 1536 and
write 7 to 15 is 32.
Enable AI Post Trigger Mode. Writing a 1 indicates a post-trigger
8
mode for Analog Input when DTRG0 interrupt enables.
Enable AI Pre Trigger Mode. Writing a 1 indicates a pre-trigger
9
mode for Analog Input when DTRG1 interrupt enables.
10 1
11 1
Enable DTRG0 External Trigger Interrupt. Writing a 1 enable
12
external signal interrupt from DTRG0.
DTRG0 Interrupt Status. Reading a 1 indicates an external
13
trigger interrupt is complete for DTRG0.
Enable DTRG1 External Trigger Interrupt. Writing a 1 enable
14
external signal interrupt from DTRG1.
DTRG1 Interrupt Status. Reading a 1 indicates an external
15
trigger interrupt is complete for DTRG1.
16:31 Reserved.
Description
User Manual, Ver. 1.0, May 2015, PMH-029-10 Page 48
Read Write
Yes Yes
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Yes Yes
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Yes Yes
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