Table of Contents
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High-speed Multifunction Boards
5
TESTING THE PCIE-8620/8622 SERIES BOARD ...................................................................................................... 36
5.1
5.2
6
I/O REGISTER ADDRESSES ................................................................................................................................... 46
6.1
ID ..................................................................................................................................................... 46
6.2
6.3
0 (MMIO) ................................................................................................................................................... 48
6.3.1
Interrupt and Initialize Control/Status Registers ......................................................................................... 48
6.3.2
Digital I/O Registers .................................................................................................................................... 50
6.3.3
Analog Input Registers ................................................................................................................................ 51
6.3.4
Analog Output Registers ............................................................................................................................. 53
6.3.5
Counter Registers ........................................................................................................................................ 54
6.4
1 (MMIO) ................................................................................................................................................... 55
6.4.1
Xilinx Spartan-6 Control/Status Registers ................................................................................................... 55
7
CALIBRATION .................................................................................................................................................... 56
7.1
..................................................................................................................................................... 56
7.2
-
7.2.1
PCIe-8622 Calibration Step .......................................................................................................................... 58
7.2.2
PCIe-8620 Calibration Step .......................................................................................................................... 80
8
WINDOWS API FUNCTION ................................................................................................................................ 90
APPENDIX: DAUGHTER BOARDS .................................................................................................................................. 91
DN-68A ........................................................................................................................................................................... 91
DN-25 ............................................................................................................................................................................. 92
........................................................................................................................................... 36
........................................................................................................................................... 41
......................................................................................................................................... 47
........................................................................................................................ 58
User Manual, Ver. 1.0, May 2015, PMH-029-10 Page 3
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