Kenwood DP-1100 B Service Manual page 81

D P - 1 1 0 0 B II
2. IC OPERATION OF EACH CIRCUIT AND PIN DESCRIPTION
Pin No.
Symbol
13 2/4S
14 14 14 14 14 14 FG IN FG IN FG IN FG IN FG IN FG IN
15 15 15 15 15 4/1 4/1 4/1 4/1 4/1
16 OVRG
17 APCG
18 DMLD
8 4
I/O Waveform
Output for CH 2/CH 4 selection judgement represented by control bit
-
0 of sub-code signal Q.
" L " = CH 2, " H " = CH 4
Input for FG pulse from disc motor.
1 or 4 pulse per each rotation of disc motor is fed to control speed of
the motor within the range of 170 to 400 rpm.
(4 pulses/disc ro­ (4 pulses/disc ro­ (4 pulses/disc ro­ (4 pulses/disc ro­ (4 pulses/disc ro­ (4 pulses/disc ro­
Disc motor speed
tation) tation) tation) tation) tation) tation)
I I I I I I
Near disc center Near disc center Near disc center Near disc center Near disc center Near disc center
Near disc edge Near disc edge Near disc edge Near disc edge Near disc edge Near disc edge
— _ r — _ r — _ r — _ r — _ r — _ r
FG IN pulse setting. Either of 1 or 4 pulse per each rotation can be
set.
I I I I I
At start
I
r
/
cation begins.
On play, CLV appl
ON/OFF selection input of APC signal generator for CLV servo con­
trol.
" L " (generator OFF):
I
" H "
I
V
5
Disc motor lock detection output of AFC signal generator for CLV ser­
vo control.
v
0 Detects the frequency of the frame sync signal. When the frequency
0 is within ± 5 % deviation, it is set. When the frequency is over ± 1 0
S T A R T f
deviation, it is reset. This output signal is the flip-flop output signal.
Lock
When set, this flip-flop output becomes " H " . This output, connected
to pin APCG, is used for control of APC block.
Description
AFCO
(rpm)
-175 Fixed to " H "
175-740 Normal operation
740- Fixed to " L "
FG pulse per each
4/1
disc motor rotation
" H " level
" L " level
V
5
Pin to select whether or not disc motor rotation
V
0 control is performed by FG IN input.
" H " - FG IN input valid
APC output is fixed to phase difference " 0 "
that is duty ratio of 50. At the same time, as
the internal phase comparison reference fre­
quency generation section is arranged into
phase difference " 0 " against the controlled
frequency, the start point of phase com­
parison when the generator is changed from
OFF to ON is set to phase difference " 0 " .
T a b l e 2 - 3 - 3 A
Remarks
APCO
Fixed to 5 0 % duty
cycle output
Normal operation
Fixed to 5 0 % duty
cycle output
1
4