Kenwood DP-1100 B Service Manual page 36

1-5 MAIN CIRCUIT OPERATION
1-5-1 R E S E T O P E R A T I O N
1 . W h e n p o w e r s w i t c h S1 is t u r n e d o n , + 5 V a n d + 8 V are
s u p p l i e d t o t h e RESET c i r c u i t f r o m t h e v o l t a g e regulated
p o w e r s u p p l y c i r c u i t .
2 . T h e rising t i m e a n d t h e falling t i m e of t h e p o w e r s u p p l y
v o l t a g e s + 5 V a n d + 8 V are different ( + 8 V rises faster
t h a n + 5 V w h e n t h e p o w e r is t u r n e d o n a n d it falls faster
w h e n t u r n e d o f f . ) T h i s c r e a t e s a difference in o p e r a t i o n
t i m i n g t o t h e m i c r o p r o c e s s o r ciruit ( + 5 V) a n d t h e a n a l o g
c i r c u i t ( + 8 V ) . D i o d e D 9 c l a m p s + 8 V until + 5 V rises,
so t h a t t h e t i m i n g d i f f e r e n c e c a n be e l i m i n a t e d .
3 . W h e n + 5 V rises, it is s u p p l i e d t o t h e e m i t t e r of Q 5 . Q 5
t u r n s o n , p r o d u c i n g a b o u t 5 V at its c o l l e c t o r . It is c o u p l e d
t o pin 1 4 of I C 1 3 a n d p u t s it t o " H " level. W h e n t h e e m i t ­
ter of Q 5 is p r o v i d e d w i t h a b o u t 5 V , t h e base v o l t a g e
b e c o m e s a b o u t 4 . 4 V d u e t o t i m e c o n s t a n t s R 3 4 a n d
C 4 2 . T h i s " H " level signal is a p p l i e d t o pin 1 5 of I C 1 3 .
4 . W h e n b o t h o f pin 1 4 a n d 1 5 are at " H " level, t h e level of
pin 1 3 c h a n g e s f r o m " H " t o " L " . T h e inverted o u t p u t is
o b t a i n e d at pin 1 1 , after g o i n g t h r o u g h pin 1 2 . pin 11 is
set at " L " level by R 3 6 , b u t it c h a n g e s t h e level f r o m " L "
t o " H " . (This signal is t e r m e d reset signal.)
D P - 1 1 0 0 B II D P - 1 I 0 0 B II
1. CIRCUIT DESCRIPTION
5. W h e n t h e reset signal is " H " level, I C 1 5 ( T M P 4 7 4 0 N ) ,
I C 1 2 , IC1 a n d IC15 ( T C 1 5 G 0 0 8 A P - 0 0 0 7 ) start f u n c t i o n ­
i n g . IC15 ( T C 1 5 G ) is, h o w e v e r , reset via Q 1 1 in o r d e r t o
a v o i d t h e o v e r l o a d i n g at pin 11 of I C 1 3 . W h e n Q 1 1 is
OFF, m o d e s 0 t h r o u g h 4 are at " L " level by m e a n s of
R 9 7 .
6 . W h e n p o w e r s w i t c h S1 is t u r n e d OFF, + 8 V d r o p s , m a k ­
ing t h e e m i t t e r v o l t a g e of Q 5 also d r o p . W h e n + 8 V d r o p s
by 1 V , t h e e m i t t e r v o l t a g e of Q 5 g o e s d o w n to a b o u t 4 V ,
because a b o u t 3 V d i s c h a r g e v o l t a g e is b e i n g p r o v i d e d by
C 1 0 2 c o n n e c t e d a c r o s s R 1 1 8 . Since t h e base v o l t a g e of
Q5 is c h a r g e d by C 4 2 , it d o e s n o t d r o p v e r y q u i c k l y . Q 5 is
p l a c e d u n d e r OFF state. T h e c o l l e c t o r v o l t a g e d r o p s , m a k ­
ing pin 13 of IC13 t o " H " level a n d pin 11 t o " L " level.
IC15 ( T M P 4 7 4 0 N ) , I C 1 2 , IC1 a n d I C 1 5 ( T C 1 5 G ) s t o p
f u n c t i o n i n g .
Fig. 1-5-1-1
VDD
Power ON Power OFF
C 4 2 R 3 4
Reset
) Reset
Approx. lOOsec
* " H " level: more t h a n 3 . 5 V
" L " L e v e l : less than 1.5 V
Fig. 1 - 5 - 1 - 2 Timing C h a r t for I C 1 3 R e s e t Signal
3 9