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• P - 1 1 G 0 B II
2. IC OPERATION OF EACH CIRCUIT AND PIN DESCRIPTION
Pin No.
Symbol
RFES control signal out­
23
RFG
put
M 0 D E 4 -
Mode select signal input
2 4 - 2 7
M0DE1
Data slice control (1) out­
28
DSL1
put
Data slice control (2) out­
29
DSL2
put
30
MODE-0
Mode select signal input
31
TEST
Test
PU motor fast-carry signal
32
PUFF
output
33
KICF
PU kick pulse output
34
DIN
Dropout data I/O
Dropout
35
DOCK
pulse output
36
FG4
FG signal output
88 kHz clock pulse input
37
CK88
38
MUT
Muting output
70
Pin name
IN/OUT
Output which controls the detection level of signal RFES. " L " only dur­
0
ing kick operation.
Input for servo system control signal generation and kick operation pro­
I
cess direction indication. Connected to the microprocessor.
Output for signal obtained by passing signal EFMI through the internal
0
buffer amp.
Has the same polarity as signal EFMI.
Output for data slice control sub circuit.
0
Detects the variation in slice level by check of the jitter of signal EFMI to
control the slice level at an optimum level.
Input for servo system control signal generation and kick operation pro­
I
cess direction indication. Connected to the microprocessor.
I
Normally, open or connected to V
0
" H " output -
0
" H " output -
I/O
Data I/O connected to shift register for dropout control
Output for clock signal (with 6 times the FGS frequency) connected to
control
clock
0
shift register for dropout control
0
Output for clock signal obtained from 30 division of signal DOCK
Input for approx. 88 kHz reference clock signal
I
0
Output for muting audio signal.
Description
.
D D
FWD, " L " output -
BWD, HiZ -
FWD, " L " output -
BWD, HiZ -
Table 2 - 2 A
Remarks
Pullup
resistor
incorporated
Pullup
resistor
incorporated
Pullup
resistor
incorporated
OFF
3-state output
Kick OFF
Pullup
resistor
incorporated
Pullup
resistor
incorporated

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