Smb2: Freeport Receive Character; Smb3: Freeport Parity Error; Smb4: Queue Overflow - Siemens Simatic S7-200 System Manual

SMB2: Freeport Receive Character

SMB2 is the Freeport receive character buffer. As described in Table D-3, each character received while in
Freeport mode is placed in this location for easy access from the ladder logic program.
Tip
SMB2 and SMB3 are shared between Port 0 and Port 1. When the reception of a character on Port 0
results in the execution of the interrupt routine attached to that event (interrupt event 8), SMB2 contains
the character received on Port 0, and SMB3 contains the parity status of that character. When the
reception of a character on Port 1 results in the execution of the interrupt routine attached to that event
(interrupt event 25), SMB2 contains the character received on Port 1 and SMB3 contains the parity
status of that character.
Table D-3 Special Memory Byte SMB2
SM Byte Description (Read Only)
SMB2 This byte contains each character that is received from Port 0 or Port 1 during Freeport communications.

SMB3: Freeport Parity Error

SMB3 is used for Freeport mode and contains a parity error bit that is set when a parity error is detected
on a received character. As shown in Table D-4, SM3.0 turns on when a parity error is detected. Use this
bit to discard the message.
Table D-4 Special Memory Byte SMB3 (SM3.0 to SM3.7)
SM Bits Description (Read Only)
SM3.0 Parity error from Port 0 or Port 1 (0 = no error; 1 = error was detected)
SM3.1 to
Reserved
SM3.7

SMB4: Queue Overflow

As described in Table D-5, SMB4 contains the interrupt queue overflow bits, a status indicator showing
whether interrupts are enabled or disabled, and a transmitter-idle memory bit. The queue overflow bits
indicate either that interrupts are happening at a rate greater than can be processed, or that interrupts
were disabled with the global interrupt disable instruction.
Table D-5 Special Memory Byte SMB4 (SM4.0 to SM4.7)
SM Bits Description (Read Only)
1
SM4.0 This bit is turned on when the communications interrupt queue has overflowed.
1
SM4.1 This bit is turned on when the input interrupt queue has overflowed.
1
SM4.2 This bit is turned on when the timed interrupt queue has overflowed.
SM4.3 This bit is turned on when a run-time programming problem is detected.
SM4.4 This bit reflects the global interrupt enable state. It is turned on when interrupts are enabled.
SM4.5 This bit is turned on when the transmitter is idle (Port 0).
SM4.6 This bit is turned on when the transmitter is idle (Port 1).
SM4.7 This bit is turned on when something is forced.
1
Use status bits 4.0, 4.1, and 4.2 only in an interrupt routine. These status bits are reset when the queue is emptied,
and control is returned to the main program.
Special Memory (SM) Bits Appendix D
D
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