Siemens Simatic S7-200 System Manual page 169

Understanding How the S7-200 Processes Interrupt Routines
The interrupt routine is executed in response to an associated internal or external event. Once the last
instruction of the interrupt routine has been executed, control is returned to the main program. You can exit
the routine by executing a Conditional Return from Interrupt instruction (CRETI). Table 6-45 emphasizes
some guidelines and restrictions for using interrupt routines in your program.
Table 6-45 Guidelines and Restrictions for Using Interrupt Routines
Guidelines
Interrupt processing provides quick reaction to special internal or external events. You should optimize interrupt
routines to perform a specific task, and then return control to the main routine.
By keeping the interrupt routines short and to the point, execution is quick and other processes are not deferred for
long periods of time. If this is not done, unexpected conditions can cause abnormal operation of equipment controlled
by the main program. For interrupts, the axiom, ''the shorter, the better,'' is definitely true.
Restrictions
You cannot use the Disable Interrupt (DISI), Enable Interrupt (ENI), High-Speed Counter Definition (HDEF), and End
(END) instructions in an interrupt routine.
System Support for Interrupts
Because contact, coil, and accumulator logic can be affected by interrupts, the system saves and reloads
the logic stack, accumulator registers, and the special memory bits (SM) that indicate the status of
accumulator and instruction operations. This avoids disruption to the main user program caused by
branching to and from an interrupt routine.
Sharing Data Between the Main Program and Interrupt Routines
You can share data between the main program and one or more interrupt routines. Because it is not
possible to predict when the S7-200 might generate an interrupt, it is desirable to limit the number of
variables that are used by both the interrupt routine and elsewhere in the program. Problems with the
consistency of shared data can result due to the actions of interrupt routines when the execution of
instructions in your main program is interrupted by interrupt events. Use the local variable table of the
interrupt routine to ensure that your interrupt routine uses only the temporary memory and does not
overwrite data used somewhere else in your program.
There are a number of programming techniques you can use to ensure that data is correctly shared
between your main program and interrupt routines. These techniques either restrict the way access is
made to shared memory locations or prevent interruption of instruction sequences using shared memory
locations.
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For an STL program that is sharing a single variable: If the shared data is a single byte, word, or
double word variable and your program is written in STL, then correct shared access can be
ensured by storing the intermediate values from operations on shared data only in non-shared
memory locations or accumulators.
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For a LAD program that is sharing a single variable: If the shared data is a single byte, word, or
double word variable and your program is written in LAD, then correct shared access can be
ensured by establishing the convention that access to shared memory locations be made using
only Move instructions (MOVB, MOVW, MOVD, MOVR). While many LAD instructions are
composed of interruptible sequences of STL instructions, these Move instructions are composed of
a single STL instruction whose execution cannot be affected by interrupt events.
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For an STL or LAD program that is sharing multiple variables: If the shared data is composed of a
number of related bytes, words, or double words, then the interrupt disable/enable instructions (DISI
and ENI) can be used to control interrupt routine execution. At the point in your main program where
operations on shared memory locations are to begin, disable the interrupts. Once all actions
affecting the shared locations are complete, re-enable the interrupts. During the time that interrupts
are disabled, interrupt routines cannot be executed and therefore cannot access shared memory
locations; however, this approach can result in delayed response to interrupt events.
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