Bootstrap Microprocessor Operation - Motorola MCS 2000 Service Instructions Manual

Static Random
Access Memory
(SRAM)
Bootstrap
Microprocessor
Operation
7-16 Controller Section Theory of Operation
Additional EEPROM is contained in the µP (U0103). This EEPROM is used to
store radio tuning and alignment data. Like the external EEPROM this
memory can be programmed multiple times and will retain the data when
power is removed from the radio.
Note: the external EEPROM plus the 512 bytes of internal EEPROM in the
68HC11F1 comprise the complete codeplug.
The SRAM (U0101) contains temporary radio calculations or parameters that
can change very frequently, and which are generated and stored by the
software during its normal operation. The information is lost when the radio
is turned off. The device allows an unlimited number of write cycles. SRAM
accesses are indicated by the CSGEN signal U101-20 (which comes from
U0103-54) going low. U0101 is commonly referred to as the external RAM as
opposed to the internal RAM which is the 1 K (1024) bytes of RAM which is
part of the µP. Both RAM spaces serve the purpose. However, the internal RAM
is used for the calculated values which are accessed most often.
Resistors R0100, R0101, and R0102 allow the board to be configured to accept
either an 8 K or 32 K byte EEPROM. For a 32 K device, R0100 is placed, and
R0102 and R0101 are NOT placed. For an 8 K device R0100 is NOT placed, and
R0102 and R0101 are placed.
Capacitor C0100 serves to filter out any ac noise which may ride on +5 V at
U0101
The bootstrap mode of operation is only used to load new software into the
FLASH EEPROM (U0106 or U0102). The MODA (U0103-33) and MODB
(U0103-32) inputs must be a logic 0 when the microprocessor comes out of
reset. The microprocessor will wait to receive data on its SCI RX (U0103-63)
line and as data is received, it will be echoed on the SCI TX (U0103-64) line.
For example, when the Smart RIB (SRIB) is used to load new software into the
FLASH EEPROM, the signals to the microprocessor are automatically
controlled by the SRIB to enter this mode. First the SRIB brings the SCI RX
DATA (J0403-19) above 12 volts. This turns on dual transistor Q0103 to bring
the MODA and MODB lines and the SCI SELECT line to a logic 0. The SRIB
then releases the LH RESET (J0403-17) line and begins transferring the data to
the radio. Data from the SRIB goes to GP I/O 4 (J0403-20) and data to the SRIB
comes from the BUS+ and BUS- lines (J0403-6 and J0403-18). After an initial
data transfer, the SRIB will bring the Vpp line (J0403-21) to 12.5 volts and start
loading the data to be stored in the FLASH. The microprocessor will verify that
each of the FLASH EEPROM memory locations are programmed correctly.