Lattice Semiconductor
• Demand Transfer Mode: In demand transfer mode, the device is programmed to continue making transfers until
a Terminal Count or external eopin_n is encountered or until dreq goes inactive. Thus, transfers continue until
the I/O device has exhausted its data capacity. After the I/O device has had a chance to catch up, the DMA ser-
vice is reestablished by dreq.
Parameter Descriptions
Table 3 lists the parameters used to configure the MCDMA core. The values of these parameters must be set prior
to functional verification. The parameters in parenthesis can be configured using the IPexpress™ software tool,
included with the ispLEVER
Table 3. MCDMA Parameters
Parameter
DMA Mode (MODE_8237)
Number of Channel
(NUM_CHANNELS)
Data Width
(DATA_BUS_WIDTH)
Address Width
(ADDR_BUS_WIDTH)
Word Count Width
(WORD_COUNT_WIDTH)
Internal Address Width
(AIN_BUS_WIDTH)
®
design tools.
Description
Defines the DMA mode. If it is TRUE, the DMA will be in
8237 mode, otherwise it will be in non-8237 mode.
Sets the number of channels. In 8237 mode it is fixed to 4
channels. In non 8237 it can be set for 1 to 16 channels
Sets the size of data buses and the temporary register.
Sets the size of DMA output address. In the 8237 mode, it
sets the size of the current and base address register. In the
non-8237 mode, it sets the size of the source address regis-
ter
Sets the size of the Word Count Register.
Value is set automatically based in the number of channels
parameter (NUM_CHANNELS or N).
Multi-Channel DMA Controller User's Guide
12
Supported Values
TRUE/FALSE
4 (8237)
1-16 (non 8237)
8 (8237)
8/16/32/64 (non 8237)
16 (8237)
16/24/32 (non 8237)
16 (8237)
8/16/24/32 (non 8237)
4 (8237)
3 when N = 1 (non 8237)
4 when N = 2 (non 8237)
5 when 3 ≤ N ≤ 4 (non 8237)
6 when 5 ≤ N ≤ 8 (non 8237)
7 when 9 ≤ N ≤ 16 (non 8237)
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