Lattice Semiconductor ispLever Core Multi-Channel DMA Controller User Manual page 24

Lattice Semiconductor
Appendix for ORCA
Table 18. Performance and Resource Utilization
Mode Name of Parameter File
8237 dma_mc_o4_2_001.lpc
Non-8237 dma_mc_o4_2_002.lpc
1. Performance and utilization characteristics are generated using OR4E02-2PBGAM680-DE in Lattice's ispLEVER 3.0 SP1 software. Syn-
®
thesized using Synplicity
performance may vary.
2. PFU is a standard logic block of some Lattice devices. For more information, check the data sheet of the device.
Supplied Netlist Configurations
The Ordering Part Number (OPN) for all configurations of this core in ORCA Series 4 devices is DMA-MC-O4-N2.
Table 19 lists the Lattice-specific netlists that are available in the Evaluation Package, which can be downloaded
from the Lattice web site at www.latticesemi.com.
Table 19. Core Configuration
Name of
Parameter File
8237 Mode
dma_mc_o4_2_001.lpc
Non-8237 Mode
dma_mc_o4_2_002.lpc
®
Series 4 FPGAs
LUTs
1258
2661
®
Synplify 7.03. When using this IP core in a different density, package, speed, or grade within the ORCA family,
Number of Channels
4
4
Multi-Channel DMA Controller User's Guide
1
ORCA 4
2
PFUs Registers
200 524
499 1187
Data Bus Width Address Bus Width
8
32
24
sysMEM™
EBRs I/O
N/A 59
N/A 125
Word Count Width
16
32
f (MHz)
MAX
58
66
16
16