Ieee Floating Point; Processor Error Detection And Recovery - IBM z13s Technical Manual

Benefits of the DFP accelerator
The DFP accelerator offers the following benefits:
Avoids rounding issues, such as those that happen with binary-to-decimal conversions.
Controls existing binary-coded decimal (BCD) operations better.
Follows the dominant decimal data and decimal operations in commercial computing
industry standardization (IEEE 745R) of decimal floating point operations. Instructions are
added in support of the Draft Standard for Floating-Point Arithmetic - IEEE 754-2008,
which is intended to supersede the ANSI/IEEE Standard 754-1985.
Allows COBOL programs that use zoned-decimal operations to take advantage of the
z/Architecture DFP instructions.
z13s servers have two DFP accelerator units per core, which improve the decimal floating
point execution bandwidth. The floating point instructions operate on newly designed vector
registers (32 new 128-bit registers).
z13s servers have new decimal floating point packed conversion facility support with the
following benefits:
Reduces code path length because extra instructions to format conversion are not needed
anymore.
Packed data is operated in memory by all decimal instructions without general-purpose
registers, which were required only to prepare for decimal floating point packed conversion
instruction.
Converting from packed can now force the input packed value to positive instead of
requiring a separate OI, OILL, or load positive instruction.
Converting to packed can now force a positive zero result instead of requiring ZAP
instruction.
Software support
Decimal floating point is supported in the following programming languages and products:
Release 4 and later of the High Level Assembler
C/C++ (requires z/OS 1.10 with program temporary fixes (PTFs) for full support or later)
Enterprise PL/I Release 3.7 and Debug Tool Release 8.1 or later
Java Applications using the BigDecimal Class Library
SQL support as of DB2 Version 9 or later

3.4.7 IEEE floating point

Binary and hexadecimal floating-point instructions are implemented in z13s servers. They
incorporate IEEE standards into the system.
The key point is that Java and C/C++ applications tend to use IEEE BFP operations more
frequently than earlier applications. Therefore, improving the hardware implementation of this
set of instructions also improves the performance of applications.

3.4.8 Processor error detection and recovery

The PU uses a process called
error is detected, the instruction unit tries the instruction again and attempts to recover the
error. If the second attempt is unsuccessful (that is, a permanent fault exists), a relocation
process is started that restores the full capacity by moving work to another PU. Relocation
transient recovery
as an error recovery mechanism. When an
Chapter 3. Central processor complex system design
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