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IBM z13s manual available for free PDF download: Technical Manual
IBM z13s Technical Manual (588 pages)
Brand:
IBM
| Category:
Server
| Size: 14 MB
Table of Contents
Front Cover
1
Table of Contents
5
Figures
17
Notices
21
Trademarks
22
IBM Redbooks Promotions
23
Authors
25
Preface
25
Comments Welcome
27
Now You Can Become a Published Author, too
27
Stay Connected to IBM Redbooks
28
Chapter 1. Introducing IBM Z13S Servers
29
Overview of IBM Z13S Servers
30
Z13S Servers Highlights
31
Processor and Memory
31
Capacity and Performance
32
I/O Subsystem and I/O Features
33
Virtualization
36
Reliability, Availability, and Serviceability Design
39
Z13S Technical Overview
39
Models
40
Model Upgrade Paths
41
Frame
41
CPC Drawer
42
I/O Connectivity: Pcie and Infiniband
44
I/O Subsystem
44
Parallel Sysplex Coupling and Server Time Protocol Connectivity
48
Special-Purpose Features
51
Reliability, Availability, and Serviceability
54
Hardware Management Consoles and Support Elements
55
IBM Z Bladecenter Extension (Zbx) Model 004
55
Blades
56
IBM Websphere Datapower Integration Appliance XI50 for Zenterprise
56
IBM Z Unified Resource Manager
57
IBM Dynamic Partition Manager
57
Operating Systems and Software
58
Supported Operating Systems
58
IBM Compilers
61
Chapter 2. Central Processor Complex Hardware Components
63
Frame and Drawers
64
The Z13S Frame
64
Z13S Frame: Rear and Front View
64
Pcie I/O Drawer and I/O Drawer Features
66
Z13S (One CPC Drawer) I/O Drawer Configurations
66
Z13S (Two CPC Drawers) I/O Drawer Configurations
66
Processor Drawer Concept
67
Model N10 Components (Top View)
68
Model N20 Components (Top View)
69
CPC Drawer (Front View)
69
CPC Drawer Logical Structure
70
CPC Drawer Interconnect Topology
71
Oscillator
71
Drawer to Drawer Communication
71
System Control
72
Oscillators Cards
72
Conceptual Overview of System Control Elements
73
CPC Drawer Power
74
Single Chip Modules
74
Redundant Dcas and Blowers for CPC Drawers
74
Processor Units and System Control Chips
75
Processor Unit (PU) Chip
75
Single Chip Modules (PU SCM and SC SCM) N20 CPC Drawer
75
PU Chip Floorplan
76
Processor Unit (Core)
77
PU Characterization
78
PU Core Floorplan
78
System Control Chip
79
SC Chip Diagram
79
Cache Level Structure
80
Memory
81
Memory Subsystem Topology
82
CPC Drawer Memory Topology
82
Redundant Array of Independent Memory
83
RAIM Configuration Per Node
83
Memory Configurations
84
Model N10 Memory Plug Locations
84
Model N20 One Drawer Memory Plug Locations
86
Model N20 Two Drawer Memory Plug Locations
88
Memory Allocation Diagram
90
Memory Upgrades
91
Preplanned Memory
91
Reliability, Availability, and Serviceability
92
RAS in the CPC Memory Subsystem
92
General Z13S RAS Features
93
Connectivity
93
Model N10 Drawer: Location of the Pcie and IFB Fanouts
94
Model N20 Two CPC Drawer: Locations of the Pcie and IFB Fanouts
94
Redundant I/O Interconnect
95
Redundant I/O Interconnect for I/O Drawer
96
Model Configurations
97
Redundant I/O Interconnect for Pcie I/O Drawer
97
Upgrades
99
Z13S Upgrade Paths
99
Concurrent PU Conversions
100
Model Capacity Identifier
100
Model Capacity Identifier and MSU Values
101
Capacity Backup
102
On/Off Capacity on Demand and Cps
104
Power and Cooling
105
Power Considerations
105
High-Voltage DC Power
106
Internal Battery Feature
106
Power Capping
106
Power Estimation Tool
106
Cooling Requirements
107
Summary of Z13S Structure
107
Chapter 3. Central Processor Complex System Design
109
Overview
110
Design Highlights
110
CPC Drawer Design
112
Cache Levels and Memory Structure
112
Z13S Cache Levels and Memory Hierarchy
112
Z13S Cache Topology
113
Z13S and Zbc12 Cache Level Comparison
114
CPC Drawer Interconnect Topology
115
Z13S CPC Drawer Communication Topology
115
Processor Unit Design
116
Point-To-Point Topology Z13S Two CPC Drawers Communication
116
Simultaneous Multithreading
117
Single-Instruction Multiple-Data
118
Two Threads Running Simultaneously on the same Processor Core
118
Schematic Representation of Add SIMD Instruction with 16 Elements in each Vector
119
Floating Point Registers Overlaid by Vector Registers
119
Out-Of-Order Execution
120
Z13S PU Core Logical Diagram
121
Z13S In-Order and Out-Of-Order Core Execution Improvements
122
Superscalar Processor
123
Compression and Cryptography Accelerators on a Chip
123
Decimal Floating Point Accelerator
124
Compression and Cryptography Accelerators on a Core in the Chip
124
IEEE Floating Point
125
Processor Error Detection and Recovery
125
Branch Prediction
126
Wild Branch
126
PU Error Detection and Recovery
126
Translation Lookaside Buffer
127
Instruction Fetching, Decoding, and Grouping
127
Extended Translation Facility
127
Instruction Set Extensions
128
Transactional Execution
128
Runtime Instrumentation
128
Processor Unit Functions
128
Overview
128
Central Processors
130
Integrated Facility for Linux
131
Internal Coupling Facility
131
IBM Z Integrated Information Processor
133
ICF Options: Shared Icfs
133
Logical Flow of Java Code Execution on a Ziip
134
System Assist Processors
137
Reserved Processors
138
Integrated Firmware Processor
138
Processor Unit Assignment
138
Sparing Rules
139
Increased Flexibility with Z/VM Mode Partitions
140
Memory Design
140
Overview
140
Main Storage
143
Expanded Storage
143
Hardware System Area (HSA)
144
Logical Partitioning
144
Overview
145
Storage Operations
152
Reserved Storage
155
Logical Partition Storage Granularity
156
LPAR Dynamic Storage Reconfiguration
157
Intelligent Resource Director
157
IRD LPAR Cluster Example
157
Clustering Technology
159
Sysplex Hardware Overview
159
Coupling Facility Control Code
160
Coupling Thin Interrupts
161
Dynamic CF Dispatching
161
Dynamic CF Dispatching (Shared Cps or Shared ICF Pus)
162
CFCC and Flash Express Use
163
Chapter 4. Central Processor Complex I/O System Structure
165
Introduction to the Infiniband and Pcie for I/O Infrastructure
166
Infiniband I/O Infrastructure
166
Pcie I/O Infrastructure
166
Infiniband Specifications
167
Pcie Generation 3
167
I/O System Overview
168
Characteristics
168
Summary of Supported I/O Features
169
I/O Drawer
170
Pcie I/O Drawer
171
I/O Domains of an I/O Drawer
171
Pcie I/O Drawer
172
Z13S (N20) Connectivity to Pcie I/O Drawers
173
Pcie I/O Drawer and I/O Drawer Offerings
174
Pcie I/O Drawer with 32 Pcie Slots and Four I/O Domains
174
Fanouts
175
Infrastructure for Pcie and Infiniband Coupling Links
176
Pcie Generation 3 Fanout (FC 0173)
177
HCA2-C Fanout (FC 0162)
177
Integrated Coupling Adapter (FC 0172)
177
HCA3-O (12X IFB) Fanout (FC 0171)
178
OM3 50/125 ΜM Multimode Fiber Cable with MPO Connectors
178
HCA3-O LR (1X IFB) Fanout (FC 0170)
179
Fanout Considerations
180
I/O Features (Cards)
182
I/O Feature Card Ordering Information
183
Physical Channel Report
184
Connectivity
185
I/O Feature Support and Configuration Rules
186
FICON Channels
188
OSA-Express5S
194
OSA-Express4S Features
196
OSA-Express for Ensemble Connectivity
199
Hipersockets
200
Parallel Sysplex Connectivity
202
Coupling Links
202
Z13 Parallel Sysplex Coupling Connectivity
204
Migration Considerations
206
CPC Drawer Front View: Coupling Links
207
HCA3-O Fanouts: Z13S Versus Z114 / Zbc12 Servers
208
Pulse Per Second Input
211
Cryptographic Functions
211
CPACF Functions (FC 3863)
211
Crypto Express5S Feature (FC 0890)
211
Integrated Firmware Processor
211
Flash Express
212
IBM Flash Express Read/Write Cache
213
10Gbe Roce Express
213
Pcie I/O Drawer that Is Fully Populated with Flash Express Cards
213
Zedc Express
214
Chapter 5. Central Processor Complex Channel Subsystem
215
Channel Subsystem
216
Multiple Channel Subsystems and Multiple Subchannel Sets
216
Multiple Logical Channel Subsystems
217
Multiple Subchannel Sets
218
Channel Path Spanning
221
Output for Display Ios,Config(All) Command
221
Systems CSS: Channel Subsystems with Channel Spanning
222
CSS, LPAR, and Identifier Example
223
I/O Configuration Management
224
Channel Subsystem Summary
224
Chapter 6. Cryptography
227
Cryptography in IBM Z13 and Z13S Servers
228
Some Fundamentals on Cryptography
228
Modern Cryptography
228
Kerckhoffs' Principle
229
Keys
230
Algorithms
231
Three Levels of Protection with Three Levels of Speed
231
Cryptography on IBM Z13S Servers
232
Cryptographic Hardware Supported on IBM Z13S Servers
232
Z13S Cryptographic Support in Z/Os
234
CP Assist for Cryptographic Functions
235
The Cryptographic Coprocessor CPACF
235
Cryptographic Synchronous Functions
236
CPACF Protected Key
237
CPACF Key Wrapping
238
Crypto Express5S
239
Cryptographic Asynchronous Functions
241
Crypto Express5S as a CCA Coprocessor
242
Crypto Express5S as an EP11 Coprocessor
246
Crypto Express5S as an Accelerator
246
Management of Crypto Express5S
247
Customize Image Profiles: Crypto
248
SE: View LPAR Cryptographic Controls
249
TKE Workstation
250
Logical Partition, TKE Host, and TKE Target
250
Optional Smart Card Reader
250
TKE Workstation with Licensed Internal Code 8.0
251
TKE Workstation with Licensed Internal Code 8.1
251
TKE Hardware Support and Migration Information
252
Cryptographic Functions Comparison
253
Cryptographic Software Support
255
Chapter 7. Software Support
257
Operating Systems Summary
258
Support by Operating System
258
Z/Os
259
Z/VM
259
Z/Vse
260
Z/Tpf
260
Linux on Z Systems
260
KVM for IBM Z Systems
261
Z13S Function Support Summary
261
Support by Function
271
Single System Image
271
Ziip Support
273
Transactional Execution
274
Maximum Main Storage Size
275
Flash Express
275
Enterprise Data Compression Express
277
10Gbe Roce Express
277
Large
278
Hardware Decimal Floating Point
279
Up to 40 Lpars
279
Separate LPAR Management of Pus
280
Dynamic LPAR Memory Upgrade
280
LPAR Physical Capacity Limit Enforcement
280
Capacity Provisioning Manager
281
Dynamic PU Add
281
Hiperdispatch
282
The 63.75-K Subchannels
283
Multiple Subchannel Sets
284
Three Subchannel Sets
284
IPL from an Alternative Subchannel Set
285
Modified Indirect Data Address Word Facility
285
Hipersockets Completion Queue
285
Hipersockets Integration with the Intraensemble Data Network
286
Hipersockets Virtual Switch Bridge
286
Hipersockets Multiple Write Facility
287
Hipersockets Ipv6
287
Hipersockets Layer 2 Support
287
Hipersockets Network Traffic Analyzer for Linux on Z Systems
288
FICON Express16S
288
FICON Express8S
289
FICON Express8
290
Z/Os Discovery and Auto-Configuration
291
High-Performance FICON
292
Request Node Identification Data
293
Subchannels for the FICON Express16S
294
Extended Distance FICON
294
Platform and Name Server Registration in FICON Channel
294
FICON Link Incident Reporting
295
FCP Provides Increased Performance
295
N_Port ID Virtualization
295
OSA-Express5S 10-Gigabit Ethernet LR and SR
296
OSA-Express5S Gigabit Ethernet LX and SX
296
OSA-Express5S 1000BASE-T Ethernet
297
OSA-Express4S 10-Gigabit Ethernet LR and SR
298
OSA-Express4S Gigabit Ethernet LX and SX
299
OSA-Express4S 1000BASE-T Ethernet
300
Open Systems Adapter for IBM Zaware
301
Open Systems Adapter for Ensemble
301
Intranode Management Network
302
Intraensemble Data Network
302
OSA-Express5S and OSA-Express4S NCP Support
302
Integrated Console Controller
303
VLAN Management Enhancements
304
GARP VLAN Registration Protocol
304
Inbound Workload Queuing for OSA-Express5S and OSA-Express4S
304
Inbound Workload Queuing for Enterprise Extender
305
Querying and Displaying an OSA Configuration
305
Link Aggregation Support for Z/VM
306
Multi-Vswitch Link Aggregation
306
QDIO Data Connection Isolation for Z/VM
306
QDIO Interface Isolation for Z/Os
306
QDIO Optimized Latency Mode
307
Large Send for Ipv6 Packets
307
OSA-Express5S and OSA-Express4S Checksum Offload
308
Checksum Offload for Ipv4And Ipv6 Packets When in QDIO Mode
308
Adapter Interruptions for QDIO
308
OSA Dynamic LAN Idle
309
OSA Layer 3 Virtual MAC for Z/Os Environments
309
QDIO Diagnostic Synchronization
309
Network Traffic Analyzer
309
Program-Directed Re-IPL
310
Coupling over Infiniband and Integrated Coupling Adapter
310
Dynamic I/O Support for Infiniband and ICA Chpids
311
Simultaneous Multithreading
311
Single Instruction Multiple Data
312
Shared Memory Communication - Direct Memory Access
312
Cryptographic Support
313
CP Assist for Cryptographic Function
313
Crypto Express5S
314
Web Deliverables
314
Z/Os Integrated Cryptographic Service Facility Fmids
314
ICSF Migration Considerations
317
GDPS Virtual Appliance
317
Z/Os Migration Considerations
317
General Guidelines
318
Hardware Configuration Definition
318
Coupling Links
318
Large
318
Capacity Provisioning Manager
318
Decimal Floating Point and Z/Os XL C/C++ Considerations
319
Z Appliance Container Infrastructure Mode LPAR
320
CFCC Level 21
321
Flash Express Exploitation by CFCC
322
CFCC Coupling Thin Interrupts
323
Result of the Display Core Command
324
Simultaneous Multithreading
325
Single-Instruction Multiple-Data
325
The MIDAW Facility
326
IDAW Usage
327
MIDAW Technical Description
327
MIDAW Format
328
MIDAW Usage
328
Extended Format Data Sets
329
Iocp
330
Worldwide Port Name Tool
331
IBM Z Bladecenter Extension (Zbx) Model 004 Software Support
332
Software Licensing
333
Monthly License Charge Pricing Metrics
334
Advanced Workload License Charges
335
Advanced Entry Workload License Charge
336
Parallel Sysplex License Charges
337
Zbx Licensed Software
338
Chapter 8. System Upgrades
339
Upgrade Types
340
Terminology Related to Cod for Z13S Systems
341
Permanent Upgrades
343
Temporary Upgrades
344
Concurrent Upgrades
345
Customer Initiated Upgrade Facility
347
The Provisioning Architecture
348
Example of Temporary Upgrade Activation Sequence
349
Summary of Concurrent Upgrade Functions
350
Miscellaneous Equipment Specification Upgrades
351
MES Upgrade for Processors
352
Memory Sizes and Upgrades for the N10
353
Preplanned Memory Feature
353
Memory Sizes and Upgrades for the Single Drawer N20
354
Memory Sizes and Upgrades for the Two Drawer N20
354
Feature on Demand Window for Zbx Blades Features Hwms
355
MES Upgrades for the Zbx
355
Permanent Upgrade through the CIU Facility
356
Permanent Upgrade Order Example
357
CIU-Eligible Order Activation Example
358
Ordering
358
Machine Profile
359
Retrieval and Activation
359
IBM Z13S Perform Model Conversion Window
360
Customer Initiated Upgrade Order Activation Number Window
360
On/Off Capacity on Demand
360
Overview
361
Ordering
362
Order On/Off Cod Record Window
364
On/Off Cod Order Example
365
On/Off Cod Testing
365
Activation and Deactivation
366
The Capacity Provisioning Infrastructure
367
IBM Z/Os Capacity Provisioning
367
A Capacity Provisioning Domain
369
Capacity for Planned Event
371
Capacity Backup
373
CBU Activation and Deactivation
375
Example of C02 with Three CBU Features
376
Automatic CBU for Geographically Dispersed Parallel Sysplex
377
Processors
378
STSI Output on Z13S Server
379
Summary of Capacity On-Demand Offerings
381
Chapter 9. Reliability, Availability, and Serviceability
383
The RAS Strategy
384
RAS Functions
386
Scheduled Outages
387
Enhanced Driver Maintenance
388
RAS Capability for the HMC and SE
390
RAS Capability for Zbx Model 004
391
Zbx Firmware
392
Considerations for Powerha in Zbx Environment
394
Typical Powerha Cluster Diagram
395
IBM Z Advanced Workload Analysis Reporter
395
Flash Express RAS Components
396
RAS Capability for Flash Express
396
Chapter 10. Environmental Requirements
397
IBM Z13S Cabling Options
398
IBM Z13S Power and Cooling
398
Top Exit I/O Cabling Feature
399
Power Consumption
399
Internal Battery Feature
400
Balanced Power Plan Ahead
401
Recommended Environmental Conditions
402
New Environmental Class for IBM Z13S Servers: ASHREA Class A3
402
Weights and Dimensions
403
IBM Zbx Configurations
404
IBM Zbx Cooling
405
Rear Door Heat Exchanger (Left) and Functional Diagram
407
IBM Zbx Physical Specifications
407
Top Exit Support for the Zbx
408
Energy Management
408
Power Estimation Tool
409
Maximum Potential Power
410
Power Usage on the System Activity Display
410
System Activity Display and Monitors Dashboard
410
IBM Systems Director Active Energy Manager
411
Unified Resource Manager: Energy Management
412
Chapter 11 . Hardware Management Console and Support Elements
416
Introduction to the HMC and SE
416
Driver Level 27 HMC and SE Enhancements and Changes
417
Diagnostic Sampling Authorization Control
418
Change LPAR Security
419
Rack-Mounted HMC
420
Ses Location
421
New Support Elements
421
Configure Backup FTP Server
422
Backup Critical Console Data Destinations
422
Backup Critical Data Destinations of Ses
423
Scheduled Operation for HMC Backup
424
Scheduled Operation for Ses Backup
424
SE Driver Support with the HMC Driver
424
HMC Feature Codes
425
Tree Style User Interface and Classic Style User Interface
426
HMC and SE Connectivity
427
SE Physical Connection
427
Network Planning for the HMC and SE
428
HMC Connectivity Examples
429
Hardware Prerequisite Changes
429
RSF Is Broadband-Only
430
Remote Support Facility
431
RSF Connections to IBM and Enhanced IBM Service Support System
432
HMC and SE Key Capabilities
433
Logical Partition Management
434
Change LPAR Group Controls - Group Absolute Capping
435
Operating System Communication
435
Manage Trusted Signing Certificates
436
Import Remote Certificate Example
436
Configure 3270 Emulators
436
HMC and SE Microcode
437
Microcode Terms and Interaction
438
System Information: Bundle Level
439
Monitoring
439
HMC Monitor Task Group
440
Monitors Dashboard Task
441
Display the Activity for an LPAR by Processor Type
441
Display the SMT Usage
441
Monitors Dashboard: Crypto Function Integration
442
Monitors Dashboard - Flash Express Function Integration
442
Environmental Efficiency Statistics
443
Capacity on Demand Support
443
Features on Demand Support
444
Customize Console Date and Time
446
Timing Network Window with Scheduled DST and Scheduled Leap Second Offset
447
NTP Client and Server Support on the HMC
448
HMC NTP Broadband Authentication Support
449
Time Coordination for Zbx Components
450
Security and User ID Management
450
System Input/Output Configuration Analyzer on the SE and HMC
452
Cryptographic Support
453
Cryptographic Configuration Window
454
Installation Support for Z/VM Using the HMC
454
Enabling Dynamic Partition Manager
455
HMC Welcome Window (CPC in DPM Mode)
456
HMC in an Ensemble
456
Unified Resource Manager Functions and Suites
457
Ensemble Definition and Management
460
HMC Availability
462
Ensemble Example with Primary and Alternate Hmcs
463
Chapter 12. Performance
465
Z13S to Zbc12, Z114, Z10 BC, and Z9 BC Performance Comparison
466
Performance Information
466
LSPR Workload Suite
467
Instruction Complexity
468
Memory Hierarchy on the Z13S One CPC Drawer System (Two Nodes)
469
Relative Nest Intensity
469
Relative Nest Intensity
470
The Traditional Factors that Were Used to Categorize Workloads
470
LSPR Workload Categories Based on Relative Nest Intensity
471
New Z/Os Workload Categories Defined
472
Relating Production Workloads to LSPR Workloads
472
Workload Performance Variation
473
Main Performance Improvement Drivers with Z13S
474
Appendix A. IBM Z Appliance Container Infrastructure
478
A.1 What Is Zaci
478
Zaci Framework Basic Outline
479
Example: Deploying IBM Zaware
479
IBM Zaware Image Profile Based on Zaci
480
Zaci Icon in the HMC Interface
480
Appendix B. IBM Z Systems Advanced Workload Analysis Reporter (IBM Zaware) . 453
482
B.1 Troubleshooting in Complex IT Environments
482
B.2 Introducing IBM Zaware
483
IBM Zaware Complements an Existing Environment
484
B.2.1 Hardware Requirements Overview
484
IBM Zaware Shortens the Business Impact of a Problem
485
B.2.3 IBM Z/Os Solutions to Improve Problem Diagnostic Procedures
485
B.3 Understanding IBM Zaware Technology
486
Basic Components of the IBM Zaware Environment
487
HMC Image Profile for an IBM Zaware LPAR
488
IBM Zaware Heat Map View Analysis
489
IBM Zaware Bar Score with Intervals
490
B.3.1 Training Period
491
B.3.4 IBM Zaware Graphical User Interface
492
Feature on Demand (Fod)
493
Feature on Demand Window for IBM Zaware Feature
494
B.4.2 IBM Zaware Operating Requirements
495
B.5 Configuring and Using IBM Zaware Virtual Appliance
496
Appendix C. Channel Options
500
C.1 Channel Options Supported on Z13S Servers
500
C.2 Maximum Unrepeated Distance for FICON SX Features
501
Appendix D. Shared Memory Communications
504
D.1 Shared Memory Communications Overview
504
RDMA Technology Overview
505
D.2.2 Shared Memory Communications over RDMA
505
Dynamic Transition from TCP to SMC-R
506
D.2.3 Single Root I/O Virtualization
506
Shared Roce Mode Concepts
507
D.2.4 Hardware
507
10Gbe Roce Express
508
10Gbe Roce Express Sample Configuration
509
D.2.6 10Gbe Roce Express Configuration Example
509
RNIC and OSD Interaction
510
D.2.7 Hardware Configuration Definitions
511
Physical Network ID Example
512
D.2.8 Software Exploitation of SMC-R
512
Reduced Latency and Improved Wall Clock Time with SMC-R
513
D.2.9 SMC-R Support Overview
513
D.2.10 SMC-R Use Cases for Z/Os to Z/Os
514
Sysplex Distributor before Roce
515
Sysplex Distributor after Roce
516
D.2.11 Enabling SMC-R Support in Z/Os Communications Server
516
D.3 Shared Memory Communications - Direct Memory Access
517
Clustered Systems: Multitier Application Solution. RDMA, and DMA
518
D.3.1 Internal Shared Memory Technology Overview
518
Connecting Two Lpars on the same CPC Using SMC-D
518
Dynamic Transition from TCP to SMC-D by Using Two OSA-Express Adapters
519
D.3.3 Internal Shared Memory - Introduction
520
Concept of Vpci Adapter Implementation
521
SMC-D Configuration that Uses Ethernet to Provide Connectivity
522
SMC-D Configuration that Uses Hipersockets to Provide Connectivity
523
D.3.5 Planning Considerations
523
ISM Adapters Shared between Lpars
524
D.3.7 Sample IOCP FUNCTION Statements
524
Multiple Lpars Connected through Multiple Vlans
525
D.3.8 Software Exploitation of ISM
526
SMCD Parameter in GLOBALCONFIG
527
D.3.10 Enabling SMC-D Support in Z/Os Communications Server
527
D.3.11 SMC-D Support Overview
528
E.1 What Is IBM Dynamic Partition Manager
530
Appendix E. IBM Dynamic Partition Manager
531
High-Level View of DPM Implementation
531
E.4 Setting up the DPM Environment
532
Enabling DPM Mode of Operation from the SE CPC Configuration Options
532
Entering the OSA Ports that will be Used by the Management Network
533
DPM Mode Welcome Window
534
Traditional HMC Welcome Window When no Cpcs Are Running in DPM Mode
535
User Options When the HMC Presents the DPM Welcome Window
535
E.4.1 Defining Partitions in DPM Mode
535
DPM Wizard Welcome Window Options
537
E.4.2 Summary
538
F.1 Why KVM for IBM Z Systems
540
Appendix F. KVM for IBM Z Systems
541
KVM Running in Z Systems Lpars
542
F.2.1 Storage Connectivity
542
F.2.3 Hardware Management Console
543
Open Source Virtualization (KVM for IBM Z Systems)
544
F.2.5 What Comes with KVM for IBM Z Systems
544
F.3 Managing the KVM for IBM Z Systems Environment
546
KVM for IBM Z Systems Management Interface
546
KVM Management by Using the Libvirt API Layers
547
F.3.1 Hypervisor Performance Manager
548
G.1 Design of Native Pcie I/O Adapter Management
550
Appendix G. Native Peripheral Component Interconnect Express
551
G.1.4 Management Tasks
552
I/O Domains and Resource Groups Managed by the IFP
551
G.3 Native Pcie Feature Definitions
553
Sample Output of AO Data or PCHID Report
553
Example of IOCP Statements for Zedc Express and 10Gbe Roce Express
555
G.3.1 FUNCTION Identifier
555
Appendix H. Flash Express
558
H.1 Flash Express Overview
558
Systems Storage Hierarchy
558
Flash Express Pcie Adapter
559
Pcie I/O Drawer that Is Fully Populated with Flash Express Cards
559
H.2 Using Flash Express
560
Sample SE/HMC Window for Flash Express Allocation to LPAR
561
Flash Express Allocation in Z/Os Lpars
562
H.3 Security on Flash Express
563
Integrated Key Controller
564
H.3.2 Key Serving Topology
565
Key Serving Topology
566
H.3.3 Error Recovery Scenarios
566
Appendix I. GDPS Virtual Appliance
570
GDPS Offerings
570
I.1 GDPS Overview
570
I.2 Overview of GDPS Virtual Appliance
572
Positioning a Virtual Appliance
572
GDPS Virtual Appliance Architecture Overview
574
I.3 GDPS Virtual Appliance Recovery Scenarios
575
GDPS Storage Failover
576
I.3.2 Unplanned Disk Outage
576
I.3.3 Disaster Recovery
577
Appendix J. IBM Zenterprise Data Compression Express
580
J.1 Overview
580
Groups
581
J.3 Software Support
581
J.3.1 Z/VM V6R3 Support with Ptfs
582
Related Publications
583
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