Concatenation Options
2.2.1
OC-48c/STM-16c ERROR TEST (BULK); (Contiguous Concatenation Mapping)
The "OC-48c/STM-16c ERROR TEST (BULK)" option is used to additionally analyze the bit
error ratio for concatenated containers in accordance with ITU-T O.150. A selectable pseudo-
random bit sequence is mapped into the concatenated container for this measurement.
Fig. I-7
2.2.2
OC-12c/STM-4c ERROR TEST (BULK); (Contiguous Concatenation Mapping)
The "OC-12c/STM-4c ERROR TEST (BULK)" option is used to additionally analyze the bit error
ratio for concatenated containers in accordance with ITU-T O.150. A selectable pseudo-random
bit sequence is mapped into the concatenated container for this measurement.
Fig. I-8
I-8
Contiguous concatenation, OC-48c/STM-16c ERROR TEST (BULK)
Contiguous concatenation, STS-12c SPE or VC-4-4c in OC-48c or STM-16c
ANT-20/ANT-20E
Introduction
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