Reproducibility Of Time-Delay And Watchdog Interrupts; Sample Calculations; Calculation Example For The Cycle Time Of The Cpu 315T-2 Dp - Siemens SIMATIC S7-300 Manual

7.5.2

Reproducibility of Time-Delay and Watchdog Interrupts

Definition of "Reproducibility"
Delay interrupt:
The deviation with time from the first instruction of the interrupt OB being called to the
programmed interrupt time.
Watchdog interrupt:
The variation in the time interval between two successive calls, measures between the first
instruction of the interrupt OB in each case.
Reproducibility
The following times apply for the CPUs described in this manual:
• Delay interrupt: +/- 200 μs
• Watchdog interrupt: +/- 200 μs
These times only apply if the interrupt can actually be executed at this time and if not
interrupted, for example, by higher-priority interrupts or queued interrupts of equal priority.
7.6

Sample calculations

7.6
7.6.1

Calculation example for the cycle time of the CPU 315T-2 DP

Structure
You have configured an S7300 and equipped it with following modules in rack "0":
• 1 CPU 315T-2 DP
• 2 digital input modules SM 321; DI 32 x 24 VDC (4 bytes each in the PI)
• 2 digital output modules SM 322; DO 32 x 24 VDC / 0.5 A
User program
According to the Instruction List, your user program has a runtime of 5 ms. There is no active
communication.
S7-300 CPU Data: CPU 315T-2 DP
Manual, 12/2005, A5E00427933-02
(4 bytes each in the PI)
Cycle and response times
7.6 Sample calculations
7-17