Appendix B
RJ45 (LVDS) Connector
Figure 27
Table 32
DT9837A, DT9837A-OEM, DT9837B, and DT9837C modules.
1
2
3
4
5
6
7
8
132
shows the RJ45 (LVDS) synchronization connector.
Figure 27: RJ45 (LVDS) Synchronization Connector
lists the pin assignments for the RJ45 (LVDS) synchronization connector on the
Table 32: RJ45 (LVDS) Synchronization Connector Pin Assignments
Pin
Clock +
(An LVDS signal for synchronizing data collection between two modules.)
Clock –
Trigger +
(An LVTTL signal that is asserted low for triggering between modules.)
Sync +
(An LVTTL signal that is asserted low for synchronizing all the analog
input signals between modules for simultaneous sample-and-hold
applications.)
Sync –
(Connected to digital ground through a 100
Trigger –
(Connected to digital ground through a 100
No Connect
No Connect
Description
Ω
resistor.)
Ω
resistor.)