Wavecom GR64 GSM/GPRS Integrator's Manual page 48

Initially, power is supplied to the VCC pins. The presence of power raises the ON/OFF
through a pull-up resistor to VCC potential. In order to power the Wireless CPU,
ON/OFF is pulled to ground. Once ON/OFF has been held low for 125ms (denoted by
t1) the primary LDOs power up; the VREF signal comes from one of the primary LDOs.
For Wireless CPU variants where VREF supplies a reference voltage to the host, it acts
as a useful indicator that the Baseband is powered.
NOTE
VREF exceeds its reset threshold approx 500µs later, and then 250ms afterwards (denoted
by t2) the RESET line goes high. The microprocessor can latch the power on state by
setting the power keep (PWR_KEEP) high after the RESET goes high and before the
power on (ON/OFF) signal is released.
It is recommended that ON/OFF is held low for at least 450ms to guarantee
completion of the power up sequence.
GR64 Integrators Manual
Page: 48/104
When the VREF is configured as an input, it cannot be used as a power
indicator.
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