Port 1; Port 2; 11Hz Signal For Manufacturing And Regulatory Testing - Iridium 9523 Developer's Manual

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Iridium Communications, Inc.
Iridium 9523 Product Developers' Guide
Revision 2.6
The PCM data input has set-up and hold time requirements of 30 ns with respect to the falling edge of the
PCM clock signal.
The two PCM ports were originally intended to be connected to a voice source/sink via a codec (such as
the Texas Instruments TLV320AIC1110) for analog audio and directly for digital audio, but there is no
need to use them in this way.
PCM clock
PCM sync
PCM output
PCM input
3.3.1

Port 1

Port 1 has the following signal pins:
Note: the data signal names on Port 1 are defined from the point of view of an externally connected
codec.
3.3.2

Port 2

Port 2 has the following signal pins:
Note: the data signal names on Port 2 are defined from the point of view of the Iridium 9523.
3.3.3

11Hz Signal for Manufacturing and Regulatory Testing

An external 'frame tick' signal needs to be passed to the Iridium 9523 during regulatory radio testing of
the host system, and possibly also during manufacturing testing. This frame signal has a period of 90ms
(11.1Hz) and is fed to the Iridium 9523 using the CODEC_PCMOUT PCM data input.
Iridium Communications, Inc.
Proprietary & Confidential Information
Only
Figure 9 - PCM waveform diagram
2
3
1 (msb)
1 (msb)
2
3
Table 9: PCM Port 1 Signals
Signal function
Signal name
PCM clock output
CODEC_PCMCLK
PCM sync output
CODEC_PCMSYNC
PCM data output
CODEC_PCMIN
PCM data input
CODEC_PCMOUT
Table 10: PCM Port 2 Signals
Signal function
Signal name
PCM clock output
UC_DACLK
PCM sync output
UC_DAFS
PCM data output
UC_DATX
PCM data input
UC_DARX
Page 25 of 115
Information Contained in this Guide
is Subject to Change Without Notice
4
4
Distribution of Guide Restricted
to Product Developers
16 (lsb)
15
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16 (lsb)

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