Pt580 F5 Schematic Diagram (Main Board_Clock) - Hytera PT580 Service Manual

Tetra portable terminal
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PT580 F5 Schematic Diagram (Main Board_Clock)

3V_TCXO
D
R2301
C2301
X2301
4
VCC
1
AFC
VCTL
C
/VCO_UP
/VCO_DOWN
B
VBAT
C2318
R2317
D2303A
4
R2318
5
A
1
2
3
PT580 F5 MAIN BOARD SCH.(CLOCK)
3V_TCXO
R2302
C2302
U2301
R2304
3
C2303
2
4
OUT
2
GND
R2305
R2303
9.216M_VCO_ON
3V3D
C2304
C2305
Q2302
R2312
R2307
R2313
R2306
C2306
C2309
Q2301
C2307
C2308
D2303B
1
6
3
2
C2319
U2306
G2301
10
VDD
32KOUT
C2320
8
OSCOUT
Y2303
/INTRC
C2321
9
OSCIN
/INTRB
5
VSS
/INTRA
3
4
5
TP2302
12MHz_REF
12MHz_CLK
R2309
C2310
C2311
2
4
U2302
R2311
C2312
C2313
R2308
L2301
D2302
D2301
C2314
R2310
3V3D
R2319 R2320 R2321 R2322
R2323
1
32K_CLK
3
SDA
I2C_SDA
2
SCL
I2C_SCL
4
/RTC_INTRC
7
/RTC_INTRB
6
/RTC_INTRA
4
5
74
6
R2315
9.216M_FPGA
R2316
2
4
9.216M_CLK
9.216M_CLK
U2303
6
7
8
D
C
B
A
7
8

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