Pt580 F5 Schematic Diagram (Main Board_Fpga) - Hytera PT580 Service Manual

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PT580 F5 Schematic Diagram (Main Board_FPGA)

D
D[0:15]
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
C
MXD_SUPPLY
/OE
/WE
A[0:22]
A7
A6
A5
A4
A3
A2
A1
A0
/FP_CS
/ADV
/SPI_CS0
R2403
/SPI_CS0
B
12MHz_CLK
/RST_OUT
3V3D
C2512
Q2502
R2510
2
3
S
D
SIM_SUPPLY
R2416
SIM_RST
SIM_CLK
SIM_DAT
A
1
2
3
PT580 F5 MAIN BOARD SCH.(FPGA)
U2401A
IO_L11P_2/VS0/A17
J3
IO
IO_L10N_2/VS1/A18
K3
IO/VREF_3
IO_L10P_2/VS2/A19
B1
IO_L01N_3
B2
IO_L01P_3
IP/VREF_2
C2
IO_L02N_3
IP_L05P_2/RDWR_B/GCLK0
C3
IO_L02P_3
IO_L11N_2/CCLK
D1
IO_L03N_3
IO_L09P_2/A21
IO_L07N_2/DIN/D0
F2
IO_L04N_3/LHCLK1
IO_L02P_2/DOUT/BUSY
F3
IO_L04P_3/LHCLK0
IO_L08P_2/A23
G1
IO_L05N_3/LHCLK3/IRDY2
IO_L08N_2/A22
F1
IO_L05P_3/LHCLK2
IO_L09N_2/A20
H1
IO_L06N_3/LHCLK5
IO_L06P_2/D2/GCLK2
G3
IO_L06P_3/LHCLK4/TRDY2
IO_L06N_2/D1/GCLK3
H3
IO_L07N_3/LHCLK7
IO_L04P_2/D4/GCLK14
H2
IO_L07P_3/LHCLK6
IO_L04N_2/D3/GCLK15
L2
IO_L08N_3
IO_L03P_2/D7/GCLK12
L1
IO_L08P_3
IO_L03N_2/D6/GCLK13
M1
IO_L09N_3
IO_L02N_2/MOSI/CSI_B
L3
IO_L09P_3
IO_L01P_2/CSO_B
E2
IP/VREF_3
IO/VREF_2
IO/D5
D2
IO_L03P_3
BANK3
BANK2
C12
IO_L01N_0
BANK0
BANK1
IP/VREF_1
A13
IO_L01P_0
IO_L10P_1/HDC1
A12
IO_L02N_0
IO_L10N_1/HDC2
B12
IO_L02P_0
IO_L09P_1/HDC
B11
IO_L03N_0/VREF_0
IO_L09N_1/LDC0
C11
IO_L03P_0
IO_L08P_1/A2
C9
IO_L04N_0/GCLK5
IO_L08N_1/A1
A10
IO_L04P_0/GCLK4
IO_L07P_1/A4/RHCLK6
A9
IO_L05N_0/GCLK7
IO_L07N_1/A3/RHCLK7
B9
IO_L05P_0/GCLK6
IO_L06P_1/A6/RHCLK4/IRDY1
B7
IO_L07N_0/GCLK11
IO_L06N_1/A5/RHCLK5
A7
IO_L07P_0/GCLK10
IO_L05P_1/A8/RHCLK2
C6
IO_L08N_0/VREF_0
IO_L05N_1/A7/RHCLK3/TRDY1
B6
IO_L08P_0
IO_L04P_1/A10/RHCLK0
B4
IO_L10P_0
IO_L04N_1/A9/RHCLK1
C4
IO_L10N_0
IO_L03P_1/A12
B5
IO_L09P_0
IO_L03N_1/A11
C5
IO_L09N_0
IO_L02P_1/A14
A3
IO_L11P_0
IO_L02N_1/A13
C8
IP_L06N_0/GCLK9
IO_L01P_1/A16
B8
IP_L06P_0/GCLK8
IO_L01N_1/A15
IO/VREF_1
IO/A0
F2501
C2511
3V3D
J2503
C1
VDD
C6
NC
C2
RST
C3
CLK
C5
GND
C7
IO
D2502
3
4
5
3V3D
R2423
R2426
R2424
R2427
R2425
R2428
P12
M11
N11
N3
M6
R2420
SYMCLOCK
N12
SPI_SCK
N10
N8
SPI_DOUT
P1
R2402
SPI_DIN
N9
M9
M10
P6
R2421
MCBSP2.FSX
P7
R2422
CMX_IRQ2
M5
CMX_BITCLK
N5
9.216M_FPGA
M4
FP_IO3
N4
FP_IO2
N2
FP_IO1
M2
BT_REST
BT_REST
P11
HOST_WAKE
HOST_WAKE
P4
BT_WAKE
BT_WAKE
G12
C14
L2401
TX_ON
C13
L2402
RX_ON
D13
L2403
SYN_ON
D12
L2404
RX_VCO_ON
F14
L2405
TX_VCO_ON
F13
L2406
SYNTH_LOCK
G14
L2407
RF_SW
G13
DOUTX
H13
DOUTY
H12
ENC_B
J13
ENC_A
J14
ENC_S
K14
SIM_RST
J12
SIM_DAT
L13
SIM_CLK
R2419
L14
SIM_SUPPLY
M12
R2401
32K_CLK
M13
/VCO_UP
N13
/VCO_DOWN
N14
9.216M_VCO_ON
K13
GPS_ON
GPS_ON
F12
FP_IO
3V3D
R2511
2
MXD_SUPPLY
R2509
C2508
U2501
8
VDD
VDA
1
TOUT
TOUT
VREF
DOUTY
2
DOUTY
DOUTX
5
DOUTX
GND
4
5
72
6
2V5D
C2401
C2402
C2403
1V2D
C2405
C2406
C2407
3V3D
C2408
C2411
3V3D
C2409
C2410
3V3D
2V5D
R2406
R2407
R2408
PROG_B
DONE
INT_B
FP_TCK
FP_TDO
FP_TMS
FP_TDI
3V3D
3V3D
R2409
R2411
HSWAP
M2
R2410
Q2503
3
S
D
C2509
4
6
C2510
7
SCK
3
6
7
8
U2401B
A5
VCCAUX
E12
VCCAUX
K1
VCCAUX
P9
VCCAUX
D
A11
VCCINT
D3
VCCINT
D14
VCCINT
K2
VCCINT
L12
P14
VCCINT
GND
P2
P10
VCCINT
GND
P5
GND
M7
GND
M3
GND
A6
K12
VCCO_0
GND
B10
J1
VCCO_0
GND
E1
H14
VCCO_3
GND
J2
G2
VCCO_3
GND
E14
GND
E3
GND
M8
C10
VCCO_2
GND
P3
C7
VCCO_2
GND
M14
C1
VCCO_1
GND
E13
A8
VCCO_1
GND
A4
GND
C
U2401C
PROG_B
A1
PROG_B
DONE
P13
DONE
INT_B
N1
IO_L01N_2/INIT_B
M0
P8
IO_L07P_2/M0
M1
N7
IO/M1
M2
N6
IP_L05N_2/M2/GCLK1
HSWAP
B3
IO_L11N_0/HSWAP
B13
TCK
A14
TDO
B14
TMS
A2
TDI
B
3V3D
3V3D
R2413
R2415
M1
M0
R2414
A
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