Hdmi, Rj45 - Clevo W540EU Service Manual

HDMI, RJ45

LAN PORT
L27
12
LAN_MDIN0
24 LAN_MDIN0 TD4-
LAN_MDIP0 11
24 LAN_MDIP0 TD4+
LAN_MDIN1 9
24 LAN_MDIN1
8 TD3-
LAN_MDIP1
24 LAN_MDIP1
TD3+
VDD10
LAN_MDIN2 6
24 LAN_MDIN2 TD2-
LAN_MDIP2 5
24 LAN_MDIP2
3 TD2+
R10 LAN_MDIN3
24 LAN_MDIN3 TD1-
LAN_MDIP3 2
24 LAN_MDIP3 TD1+
*0_04 TCT4 10
7 TCT4
TCT3
TCT3
TCT2 4
TCT2
TCT1 1
TCT1
NS892402
C16 C8 C10 C9
0.01u_16V_X7R_04 *0.01u_16V_X7R_04 *0.01u_16V_X7R_04 *0.01u_16V_X7R_04
FOR INTEL GRAPHIC
FOR TI1442 R3.5
¹w¯d2.2K¹ï¦a,¤£¤W¥ó
U7
39
C237 0.1u_10V_X7R_04 HDMIC_C0CN_C
15 HDMIC_C0CN
IN_D1+
HDMIC_C0CP_C 38
C236 0.1u_10V_X7R_04
15 HDMIC_C0CP
IN_D1-
42
C239 0.1u_10V_X7R_04 HDMIC_C1CN_C
15 HDMIC_C1CN IN_D2+
41
C238 0.1u_10V_X7R_04 HDMIC_C1CP_C
15 HDMIC_C1CP
IN_D2-
C241 0.1u_10V_X7R_04 HDMIC_C2CN_C 45
15 HDMIC_C2CN
IN_D3+
C240 0.1u_10V_X7R_04 HDMIC_C2CP_C 44
15 HDMIC_C2CP IN_D3-
HDMIC_CLKCN_C 48
C243 0.1u_10V_X7R_04
15 HDMIC_CLKCN
IN_D4+
C242 0.1u_10V_X7R_04 HDMIC_CLKCP_C 47
15 HDMIC_CLKCP
IN_D4-
R369 *2.2K_04
9
HDMI_CTRLCLK
15 HDMI_CTRLCLK
SCL
HDMI_CTRLDATA 8
15 HDMI_CTRLDATA
SDA
7
15 HDMI_HPD HPD/HPDX
OE# 25
R205 *4.7K_04
3.3VS
OE#
R360 *0_04
R3.5
32
R222 *4.7K_04 DCC_EN#
3.3VS DCC_EN
FOR
REXT 6
R211 *499K_1%_04
TI1442»Ý-קï499-->3.4K
REXT
3
R221 *4.7K_04 PC0
3.3VS
PC0/PEQ
R220 *4.7K_04
4
R217 *4.7K_04 PC1
3.3VS PC1/PIO
R216 *4.7K_04
R230 *4.7K_04 DDCBUF_EN 34
3.3VS
DDCBUF_EN/DDCBUF
R365 *4.7K_04
PRE/CFG 35
R236 *4.7K_04
3.3VS
CFG/PRE
R366 *4.7K_04
CEXT/RT_EN# 10
C199 *2.2u_6.3V_X5R_04
RT_EN#/CEXT
PS8101»PPS8171®t²§
HPDX: Output level and polarity of HPD is defined by PIO
PIO=LOW: HPD=HPD_SINK@3.3V CMOS output
*PS8171QFN48GTR
PIO=High: HPD=HPD_SINK#(inverted HPD)@0.9V
PIO: Internal pull down ~ 500k ohm
PEQ: TMDS iutput equalization control, 3 level CMOS input,
internal pull-down at ~ 500k ohm ¦¹°Ï¶ô,W/ LEVELSHIFT®É¤W¥ó
PEQ=LOW: Mid level EQ(Default)
PEQ=High: High level EQ
DDCBUF: DDC Active Buffer enable and setting, 3 level CMOS input,
PEQ=MID: Low level EQ
internal pull-down at ~ 500k ohm
PRE: TMDS output driver pre-emphasis level setting,
DDCBUF=LOW:
3 level CMOS input, internal pull-down at ~ 500k ohm
DDCBUF=High: Active DDC bufer enable, setting 1
PRE=LOW: No pre-emphasis
DDCBUF=MID:
3/23
13
LMX1-
MX4-
14 LMX1+
MX4+
16 LMX2- LMX1+ 1 2 DLMX1+
MX3- 17
LMX2+
MX3+ 4 3
LMX1- DLMX1-
19 LMX3-
L26 *WCM2012F2S-SHORT
MX2-
20 LMX3+
MX2+ 22
LMX4-
MX1-
23 LMX4+
MX1+
LMX2+ 1 2 DLMX2+
15 NMCT_4 R8 75_04 NMCT_R
MCT4 18 4 3
NMCT_3 R7 75_04 LMX2- DLMX2-
MCT3
21 NMCT_2
R3 75_04
MCT2
24 NMCT_1
R2 75_04 L2 *WCM2012F2S-SHORT
MCT1
C297
1000p_2KV_X7R_12_H125
LMX3+ 1 2 DLMX3+
LMX3- 4 3 DLMX3-
J_RJ1
DLMX1+ 1 GND1 L1 *WCM2012F2S-SHORT
2 DA+ shield GND2
DLMX1-
DA- shield
3
DLMX2+
DB+
DLMX2- 6
DB-
LMX4+ 1 2 DLMX4+
4 4 3
DLMX3+ LMX4- DLMX4-
DC+
DLMX3- 5
DC-
DLMX4+ 7 L28 *WCM2012F2S-SHORT
8 DD+
DLMX4-
DD-
4/5
130451-0M
Main 6-21-B4060-008
HDMI CONNECTOR
3/28
22
TMDS_DATA2#-R
OUT_D1+
23 TMDS_DATA2-R
5VS D2
OUT_D1-
RB551V-30S2
19 A C
TMDS_DATA1#-R 5VS_HDMI_IN
OUT_D2+
20
TMDS_DATA1-R
OUT_D2-
16 TMDS_DATA0#-R
OUT_D3+
17 TMDS_DATA0-R
OUT_D3-
C167
13 TMDS_CLOCK#-R
OUT_D4+
14 TMDS_CLOCK-R *10u_6.3V_X5R_06
OUT_D4-
28
HDMI_SCL-C
SCL_SINK
29 HDMI_SDA-C
SDA_SINK
30 HDMI_HPD-C
HPD_SINK
2
VCC[1] 3.3VS
15 TMDS_CLOCK#-R
R145
VCC[3] 21
C202 C385 C379 C374 C384
VCC[4] 26
TMDS_CLOCK-R R156
VCC[5]
40
*0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
VCC[7]
46
*0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
VCC[8]
*0.1u_16V_Y5V_04
11
APD/VCC R191 *4.7K_04 TMDS_DATA1#-R R190
VCC[2]/APD 3.3VS
R196 *4.7K_04 R3.5
TMDS_DATA1-R
R195
33 EMI1/VCC R226 *4.7K_04
3.3VS
VCC[6]/EMI1
R364 *4.7K_04 3/23
27 EMI0/GND
R214 *4.7K_04
3.3VS
GND[6]/EMI0
R363 *4.7K_04 5VS
12
RS/GND R186 *4.7K_04
3.3VS
GND[3]/Reserv ed1
1
R185 *0_04
GND[1]/Reserv ed0
5
GND[2] 18 S D
PS8101»PPS8171®t²§ HDMIGND
GND[4]
24
GND[5]
31
Q17
GND[7]
36 MTN7002ZHS3
GND[8] 37
GND[9] 43
APD: Automatic power down managementl, 3 level CMOS input,
GND[10]
internal pull-up at ~ 500k ohm
APD=LOW: Automatic power down disable
APD=High: Automatic power down enable
PIN 49=GND
APD=MID: Reserved
EMI0,EMI1: EMI reduction and filter setting, 3 level CMOS input,
EMI1 internal pull-up at ~ 500k ohm
EMI0 internal pull-down at ~ 500k ohm
[EMI1,EMI0]=HL: No EMI reduction
EMI0=High: Increased rise/fall time
No DDC active buffer, passive DDC level shifting
MID, Increased rise/fall time,2nd
EMI1=LOW: EMI filter setting 1
Active DDC bufer enable, setting 2
MID: Reserved
FOR W/O LEVEL SHIFT
*0_8P4R_04_SHORT
8
HDMIC_C0CP_C
7
HDMIC_C0CN_C
HDMIC_C1CP_C 6
3.3VS HDMIC_C1CN_C 5
Q16A
MTDK5S6R *0_8P4R_04_SHORT
HDMIC_C2CP_C 8
1 6 7
HDMI_CTRLCLK HDMI_SCL-C HDMIC_C2CN_C
6
HDMIC_CLKCP_C
HDMIC_CLKCN_C 5
3.3VS
Q16B
MTDK5S6R *0_8P4R_04_SHORT
TMDS_DATA2-L 8
HDMI_CTRLDATA 4 3 HDMI_SDA-C TMDS_DATA2#-L 7
6
TMDS_DATA1-L
TMDS_DATA1#-L 5
*0_8P4R_04_SHORT
TMDS_DATA0-L 8
3.3VS TMDS_DATA0#-L 7
TMDS_CLOCK-L 6
5
TMDS_CLOCK#-L
Q5 B R228 HDMI_HPD-C 3/23
3.3VS
*2N3904 *200K_1%_04
HDMI_HPD
R227 R237
*10K_04 1M_04 Q6
MTN7002ZHS3
S D
HDMI_HPD HDMI_HPD-C
R241
¦pªG¦³¤Wlevel shift, R241-n§ï¬°100K
5VS_HDMI
R355 R352
2.2K_04 2.2K_04
D16
5VS_HDMI
*BAV99 RECTIFIER
R111 1_04
J_HDMI1 HDMI_SCL-C
C12822-100A
HDMI_SDA-C
C164 HDMI_HPD-C
22u_6.3V_X5R_08
19 HDMI_HPD-C
HOT PLUG DETECT
18
+5V
17
DDC/CEC GND
HDMI_SDA-C 16
SDA
15 HDMI_SCL-C
SCL
14
RESERVED
13 HDMI_CEC
CEC
TMDS_CLOCK# 12
*10mil_short_04
TMDS CLOCK- 11
10 CLK SHIELD
*10mil_short_04 TMDS_CLOCK
TMDS CLOCK+
9
TMDS_DATA0# R169
TMDS DATA0-
8
SHIELD0 7
TMDS_DATA0 R179
6 TMDS DATA0+
*10mil_short_04 TMDS_DATA1#
TMDS DATA1-
5
SHIELD1
TMDS_DATA1 4
*10mil_short_04
TMDS DATA1+
3 TMDS_DATA2# R204
2 TMDS DATA2-
SHIELD2
1
TMDS_DATA2 R210
TMDS DATA2+
HDMIGND
Schematic Diagrams
RN16
1
TMDS_DATA2-L
2
TMDS_DATA2#-L
3 TMDS_DATA1-L
4 TMDS_DATA1#-L
RN15
1 TMDS_DATA0-L
2
TMDS_DATA0#-L
3
TMDS_CLOCK-L
4 TMDS_CLOCK#-L
RN14
1 TMDS_DATA2-R
2 TMDS_DATA2#-R
3
TMDS_DATA1-R
4 TMDS_DATA1#-R
RN13
1 TMDS_DATA0-R
2 TMDS_DATA0#-R
3 TMDS_CLOCK-R
4
TMDS_CLOCK#-R
Sheet 26 of 42
HDMI, RJ45
20K_1%_04
For ESD
D17 D14
*BAV99 RECTIFIER
*BAV99 RECTIFIER
*10mil_short_04 TMDS_DATA0#-R
*10mil_short_04 TMDS_DATA0-R
*10mil_short_04 TMDS_DATA2#-R
*10mil_short_04 TMDS_DATA2-R
3/23
HDMI, RJ45 B - 27