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A.1 Watchdog Timer Registers
PCM-QM77 Rev.B utilizes Fintek 81666 chipset as its watchdog timer controller.
Below are the procedures to complete its configuration and the AAEON intial
watchdog timer program is also attached based on which you can develop customized
program to fit your application.
Configuring Sequence Description
After the hardware reset or power-on reset, the Fintek 81666 enters the normal mode
with all logical devices disabled except KBC. The initial state (enable bit) of this logical
device (KBC) is determined by the state of pin 121 (DTR1#) at the falling edge of the
system reset during power-on reset.
Appendix A – Watchdog Timer Programming
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