Aaeon PCM-QM77 User Manual page 159

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mov
mov al, ch
out
mov
mov
out
mov dx, 0f040h + 05h
mov al, ah
out
mov
mov
out
call
CT_Chk_SMBus_Ready
ret
Ct_I2CWriteByte
Endp
; Wait until the busy bit clears, indicating that the SMBUS
; activity has concluded.
CT_Chk_SMBus_Ready
mov dx,0f040h+ 0;status port
clc
mov cx,0800h
Chk_I2c_OK:
Appendix F – Digital I/O Ports
dx, 0f040h + 04h
; Set the slave address and
dx, al
dx, 0f040h + 03h
al, cl
dx, al
dx, al
dx, 0f040h + 00h
al, 48h ; Start a byte access
dx, al
Proc Near
; Transmit Slave Address Register
; prepare for a WRITE command
; Host Command Register
; offset to write
; Host Control Register
144

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