Digital Routing And Clock Generation; Digital Routing; Clock Routing - National Instruments NI cDAQ-9181 User Manual

Digital Routing and Clock
Generation
This chapter describes the digital routing and clock routing circuitry on the cDAQ chassis. Refer

Digital Routing

to the
Digital Routing
The digital routing circuitry has the following functions:
• Manages the flow of data between the bus interface and the acquisition/generation
sub-systems (analog input, analog output, digital I/O, and the counters). The digital routing
circuitry uses FIFOs (if present) in each sub-system to ensure efficient data movement.
• Routes timing and control signals. The acquisition/generation sub-systems use these
signals to manage acquisitions and generations. These signals can come from the following
sources:
– Your C Series modules
– User input through the PFI terminals using parallel digital C Series modules or the
cDAQ-9188 chassis PFI terminals
• Routes and generates the main clock signals for the cDAQ chassis. To determine the signal
routing options for C Series module(s) installed in the cDAQ chassis, refer to the Device
Routes tab in MAX.

Clock Routing

Figure 6-1 shows the clock routing circuitry of the cDAQ chassis.
Onboard
80 MHz
Oscillator
Clock Routing
and sections.
Figure 6-1. Clock Routing Circuitry
÷
4
÷
200
80 MHz Timebase
20 MHz Timebase
100 kHz Timebase
© National Instruments | 6-1
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