Pioneer PX-7 Service Manual page 86

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(1)
Video
control
circuit
EXTV
reading
(T)
EXTV
is
a
status signal indicating
the presence/
absence of
an
external video
signal
(L
level
when
p
resent)
®
EXTV
is
read
by
the
CPU
when
bit
7 of the
VCON
register
is
read.
(3)
Example:
The
VCON
register
contents
are
placed
in
register
A
by
LD
A,
(7FFFH)
and
the
EXTV
status
is
indicated
by
D7.
EXTV
reading
WA
V7//////A
Y7777,
Fig.
13-16
EXTV
reading timing
VO VLY
gene
ration
(T)
The
VOVLY
control
signal
used
in
computer
mode
and
superimpose/extemal
video
mode
switching
is
only switched to
L when
an
external
video
signal
is
applied
(EXTV
at
L)
with
L
written
in bit
0 of
the
VCON
register.
(2)
When
RESET
is
switched
to L,
VOVLY
is
switched
to
H
with point
E
in
Fig.
13-19at
H.
(3)
The
DO
status
(L or
H)
is
latched
by
the
leading
edge
of
VCON
W, and
the
Q
output
(E)
is
ORed
with
EXTV
to obtain the
VOVLY
signal.
VOVLY
generation
INTEXV
generation
(1)
The
INTEXV
and
INTEXV
signals
are generat-
ed
when
the
external video
signal
stops
in
superimpose
or external video
mode.
INTEXV
serves as
the
CPU
interrup
signal,
and
INTEXV
serves
as
the corresponding
status
signal.
(2)
Since
p
oint
A
is
at
H
and
point
B
at
L
when
RESET
is
applied,
point
C
and
point
D
are
switched to H,
resulting in
INTEXV
also
being
switched to H.
And when
the
VCON
register
is
read,
INTEXV=0
is
obtained
from
bit
0.
(3)
When
EXTV
is
changed from
L
to
H
(that
is,
when
the
external video
signal
is
stopped),
point
C
is
kept
at
L
from
the leading edge of
the
next
0 up
to the
trailing
edge of the next
0
after that,
thereby
resulting
in
point
D
becom-
ing
L
and
point
D
H.
(4)
If
point
E
is
L
(designation of
superimpose
or
external video
mode),
INTEXV
is
switched to
L
to generate
a
CPU
interrupt.
(5)
INTEXV=1
is
obtained
from
bit
0
when
the
VCON
register
is
read during the
interrupt
processing
routine,
thereby
indicating that
the
interrupt
is
from
INTEXV.
After
completing
the read
operation, point
D
is
changed
to
H
and
point
D
to
L by
t
he
VCONR
leading edge,
resulting
in
INTEXV
being
reverted to
H
to
cancel
the
interrupt.
INTEXV
generation
Fig.
13-18
INTEXV
generation timing

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