Appendix A: Watchdog Timer - Aaeon PCM-6896 Manual

WatchDog Timer
PCM-6896 utilizes ITE 8712 chipset as its watchdog timer controller.
Below are the procedures to complete its configuration and the
AAEON intial watchdog timer program is also attached based on
which you can develop customized program to fit your application.
Configuring Sequence Description
After the hardware reset or power-on reset, the ITE 8712 enters the
normal mode with all logical devices disabled except KBC. The
initial state (enable bit ) of this logical device (KBC) is determined
by the state of pin 121 (DTR1#) at the falling edge of the system
reset during power-on reset.
N N N
9 4 PCM-6896 User Manual
Hardware Reset Hardware Reset Hardware Reset
Wait for key string Wait for key string Wait for key string
Is the data "87h"? Is the data "87h"? Is the data "87h"?
Y Y Y
Check Pass key Check Pass key Check Pass key
N N N
Next Data? Next Data? Next Data?
Y Y Y
N N N
Last Data? Last Data? Last Data?
Y Y Y
MB PnP Mode MB PnP Mode MB PnP Mode
Any other I/O transition cycle Any other I/O transition cycle Any other I/O transition cycle
I/O write to 2Eh I/O write to 2Eh I/O write to 2Eh
Any other I/O transition cycle Any other I/O transition cycle Any other I/O transition cycle
I/O write to 2Eh I/O write to 2Eh I/O write to 2Eh