Ax88796Blf (Yc258A00) Lan Controller; Fin1215Mtdx (Yc491A00) Lvds Serializer/De-Serializer - Yamaha TYROS4 Service Manual

AX88796BLF (YC258A00) LAN CONTROLLER

PIN
NAME I/O
NO.
1 VCC3A3 Power supply for analog circuit (+3.3V DC)
2 GND3A3 Power supply for analog circuit (+0V DC or Ground power)
3 TPI+ I Twisted pair receive input, positive
4 TPI I Twisted pair receive input, negative
5 VCC18A Analog power for oscillator, PLL, and Ethernet
PHY differential I/O pins, 1.8V
6 TPO+ O Twisted pair transmit output, positive
7 TPO- O Twisted pair transmit output, negative
8 GND18A Analog ground for oscillator, PLL, and Ethernet
PHY differential I/O pins
9 V18F On-chip 3.3V to 1.8V Regulator output +1.8V DC
10 VCC3R3 On-chip 3.3V to 1.8V Regulator power supply (+3.3V DC)
11 GND3R3 On-chip 3.3V to 1.8V Regulator ground
12 TEST2 I
TEST mode select
13 TEST1 I
14 I_LK/ACT O Link status/Active
15 I_SPEED O Speed status
16 I_FULL/COL O Full-duplex/Collision status
17 RSTn I Reset
Ground
18 GND
EEPROM data in/out
19 EEDIO I/O
20 EECK I/O EEPROM clock
21 EECS I/O EEPROM chip select
22 PME O Wakeup indicator
23 IRQ O Programmable interrupt request
24 VCCK Power supply for core logic (+1.8V DC)
25 VCC3IO Power supply for IO (+3.3V DC)
26 GND Ground
27 SD15 I/O
28 SD14 I/O
29 SD13 I/O
System data bus
30 SD12 I/O
31 SD11 I/O
32 SD10 I/O

FIN1215MTDX (YC491A00) LVDS SERIALIZER/DE-SERIALIZER

PIN
NAME I/O
NO.
1 TxIn4 I LVTTL level input
2 V I Power supply pin for LVTTL inputs
CC
3 TxIn5 I
LVTTL level input
4 TxIn6 I
5 GND I Ground pin for LVTTL inputs
6 TxIn7 I
LVTTL level input
7 TxIn8 I
8 V I Power supply pin for LVTTL inputs
CC
9 TxIn9 I
LVTTL level input
10 TxIn10 I
11 GND I Ground pin for LVTTL inputs
12 TxIn11 I
LVTTL level input
13 TxIn12 I
14 V I Power supply pin for LVTTL inputs
CC
15 TxIn13 I
LVTTL level input
16 TxIn14 I
17 GND I Ground pin for LVTTL inputs
18 TxIn15 I
LVTTL level input
19 TxIn16 I
20 TxIn17 I
21 V I Power supply pin for LVTTL inputs
CC
22 TxIn18 I
LVTTL level input
23 TxIn19 I
24 GND I Ground pin for LVTTL inputs
FUNCTION
FUNCTION
PIN
NAME I/O
NO.
33 SD9 I/O
34 SD8 I/O
35 SD7 I/O
36 SD6 I/O
37 SD5 I/O System data bus
38 SD4 I/O
39 SD3 I/O
40 SD2 I/O
41 SD1 I/O
42 SD0 I/O
43 VCCK Power supply for core logic (+1.8V DC)
44 VCC3IO Power supply for IO (+3.3V DC)
45 SA5,FIFO_SEL I System address or FIFO select
46 SA4 I
47 SA3 I
48 SA2 I System address
49 SA1 I
50 SA0 I
51 AEN,PSEN I Address enable
52 CSn I Chip select
53 RDn I Read
54 WRn I Write
55 IOIS16n I/O 16 bit port
56 TCLK I Test Clock Pin
57 TClK_EN I Enable TCLK in to ASIC as a main clock for test only
58 GND Ground
59 VCCK Power supply for core logic (+1.8V DC)
60 VCC18A Analog power for oscillator, PLL, and Ethernet
PHY differential I/O pins, 1.8V
61 XTALIN I Crystal/Oscillator input
62 XTALOUT O Crystal/Oscillator output
63 GND18A Analog ground for oscillator, PLL, and Ethernet
PHY differential I/O pins
64 RSET_BG O Off-chip resister
PIN
NAME I/O
NO.
25 TxIn20 I LVTTL level input
26 TxCLKIn I LVTTL level clock input
27 PwrDn I LVTTL level power-down input
28 PLL GND I Ground pin for PLL
29 PLL V I Power supply pin for PLL
CC
30 PLL GND I Ground pin for PLL
31 LVDS GND I Ground pin for LVDS outputs
32 TxCLKOut+ O Positive LVDS differential clock output
33 TxCLKOut- O Negative LVDS differential clock output
34 TxOut2+ O Positive LVDS differential data output
35 TxOut2- O Negative LVDS differential data output
36 LVDS GND I Ground pin for LVDS outputs
37 LVDS V I Power supply pin for LVDS outputs
CC
38 TxOut1+ O Positive LVDS differential data output
39 TxOut1- O Negative LVDS differential data output
40 TxOut0+ O Positive LVDS differential data output
41 TxOut0- O Negative LVDS differential data output
42 LVDS GND I Ground pin for LVDS outputs
43 N.C. Not connected
44 TxIn0 I
LVTTL level input
45 TxIn1 I
46 GND I Ground pin for LVTTL inputs
47 TxIn2 I
LVTTL level input
48 TxIn3 I
Tyros4
DM: IC400
FUNCTION
IC014
DM: IC304 IC014
FUNCTION
37