Memory; Memory Speed - IBM System x3850 X5 Implementation Manual

2.3 Memory

In this section, we describe the major features of the memory subsystem in eX5 systems. We
describe the following topics in this section:
2.3.1, "Memory speed" on page 22
2.3.2, "Memory DIMM placement" on page 23
2.3.3, "Memory ranking" on page 24
2.3.4, "Nonuniform memory architecture (NUMA)" on page 26
2.3.5, "Hemisphere Mode" on page 26
2.3.6, "Reliability, availability, and serviceability (RAS) features" on page 28
2.3.7, "I/O hubs" on page 30

2.3.1 Memory speed

As with Intel Xeon 5500 processor (Nehalem-EP), the speed at which the memory that is
connected to the Xeon 7500 and 6500 processors (Nehalem-EX) runs depends on the
capabilities of the specific processor. With Nehalem-EX, the scalable memory interconnect
(SMI) link runs from the memory controller integrated in the processor to the memory buffers
on the memory cards.
The SMI link speed is derived from the QPI link speed:
6.4 gigatransfers per second (GT/s) QPI link speed capable of running memory speeds up
to 1066 MHz
5.86 GT/s QPI link speed capable of running memory speeds up to 978 MHz
4.8 GT/s QPI link speed capable of running memory speeds up to 800 MHz
Gigatransfers: Gigatransfers per second (GT/s) or 1,000,000,000 transfers per second is
a way to measure bandwidth. The actual data that is transferred depends on the width of
the connection (that is, the transaction size). To translate a given value of GT/s to a
theoretical maximum throughput, multiply the transaction size by the GT/s value. In most
circumstances, the transaction size is the width of the bus in bits. For example, the SMI
links are 13 bits to the processor and 10 bits from the processor.
Because the memory controller is on the CPU, the memory slots for a CPU can only be used
if a CPU is in that slot. If a CPU fails when the system reboots, it is brought back online
without the failed CPU and without the memory associated with that CPU slot.
QPI bus speeds are listed in the processor offerings of each system, which equates to the
SMI bus speed. The QPI speed is listed as x4.8 or similar, as shown in the following example:
2x 4 Core 1.86GHz,18MB x4.8 95W (4x4GB), 2 Mem Cards
2x 8 Core 2.27GHz,24MB x6.4 130W (4x4GB), 2 Mem Cards
The value x4.8 corresponds to an SMI link speed of 4.8 GT/s, which corresponds to a
memory bus speed of 800 MHz. The value x6.4 corresponds to an SMI link speed of
6.4 GT/s, which corresponds to a memory bus speed of 1066 MHz.
The processor controls the maximum speed of the memory bus. Even if the memory dual
inline memory modules (DIMMs) are rated at 1066 MHz, if the processor supports only 800
MHz, the memory bus speed is 800 MHz.
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IBM eX5 Implementation Guide