JVC MX-DVB10 Service Manual page 70

MX-DVB10
TC7WH74FU-X (IC321) : Clock buffer
1. Pin layout
(TOP VIEW)
CK 1
D 2
Q 3
GND 4
2. Block diagram
PR (7)
CK (1)
D (2)
CLR (6)
STK402-230 (IC321) : Power amp
1. Pin layout
STK402-230
1
2. Block diagram
PRE+Vcc 4
R1
TR1
CH1IN 1
CH1NF 2
TR3
R2
PRE-Vcc 12
BIAS 5
-Vcc 9
GND 13
1-70
8 Vcc
7 PR
6 CLR
5 Q
(5)
S
C
D (3)
R
19
TR4
R6
C1
TR7
R3
TR2
R4
TR8
TR5
R5
TR6
D1
R7
7 6 10
SUB
TC7W125FU-X (IC412) : Buffer
1. Pin layout
2. Block diagram
G1
A1
Y2
Q
GND
Q
R13
TR11
R8
C2
TR9
R11
TR14 TR15
R12
TR10
TR12
TR16
R10
TR13
R14
R9
11 14 15 16 17
1 8
2 7
3 6
4 5
R20
TR21
R15
C3
TR17
R18
TR23
TR22
R19
TR18
TR19
TR24
R17
TR20
R21 R16
19 18
Vcc
G2
Y1
A2
8 +Vcc