Profichip VPC3+C User Manual page 88

10 Operational Specifications
AB10..0
DB7..0
XWR
XCS
XREADY
(normal)
XREADY
(early)
Figure 10-13: Asynchronous Intel Mode, WRITE (XRD = 1)
No.
address-setuptime to XRD / XWR ↓
16
XRD ↓ to data valid
17
18 XRD pulsewidth
XCS ↓ setup time to XRD / XWR ↓
19
XRD ↓ to XREADY ↓ (Normal-Ready)
20
XRD ↓ to XREADY ↓ (Early-Ready)
21
22 XRD / XWR cycletime
address holdtime after XRD / XWR ↑
23
data holdtime after XRD ↑
24
25 read/write inactive time
XCS holdtime after XRD / XWR ↑
26
27 XREADY holdtime after XRD / XWR
data setuptime to XWR ↑
28
29 XWR pulsewidth
data holdtime after XWR ↑
30
Figure 10-14: Timing, Asynchronous Intel Mode
88
valid
16
19
20
21
Parameter
Revision 1.03
data valid
28
29
22
VDD = 3.3 V
MIN MAX
0
103
115
0
132
111
125
0
4 16
10
0
6 21
10
83
10
Copyright © profichip GmbH 2004-2006
23
30
25
26
27
VDD = 5 V
MIN MAX Unit
0 ns
97 ns
115 ns
0 ns
126 ns
105 ns
125 ns
0 ns
4 13 ns
10 ns
0 ns
5 16 ns
10 ns
83 ns
10 ns
VPC3+C User Manual