Profichip VPC3+C User Manual page 72

8 Hardware Interface
Synchronous Motorola Mode
Motorola microcontrollers like the HC11 types K, N, M, F1 or the HC16- and
HC916 types with programmable E_Clock timing can be used in this mode.
When using HC11 types with a multiplexed bus the address signals AB7..0
must be generated from the DB7..0 signals externally.
72
Synchronous bus timing without evaluation of the XREADY signal
8-bit non-multiplexed bus: DB7..0, AB10..0 (AB11..0 in 4K Byte mode)
The internal VPC3+C address decoder is disabled, the XCS input is
used instead.
For microcontrollers with chip select logic (K, F1, HC16 and HC916),
the chip select signals are programmable regarding address range, pri-
ority, polarity and window width in the write cycle or read cycle.
For microcontrollers without chip select logic (N and M) and others, an
external chip select logic is required. This means additional hardware
and a fixed assignment.
If the CPU is clocked by the VPC3+C, the output clock pulse (CLKOUT
2/4) must be 4 times larger than the E_Clock. That is, a clock pulse sig-
nal must be present at the CLK input that is at least 10 times larger than
the desired system clock pulse (E_Clock). The Divider-Pin must be
connected to '0' (divider 4). This results in an E_Clock of 3 MHz.
AB11 must be connected to ALE/AS (pin 24) in 4K Byte mode as this is
the additional address bus signal in this mode. In 2K Byte mode this pin
is not used and should be pulled to GND.
Revision 1.03
VPC3+C User Manual
Copyright © profichip GmbH 2004-2006