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Intel SHG2 DP Technical Product Specification

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Intel
SHG2 DP Server Board
Technical Product Specification
Intel Order Number C11343-001
Revision 1.0
June 2002
Enterprise Platforms and Services Division
Intel Order Number C11343-001

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  • Page 1 ® Intel SHG2 DP Server Board Technical Product Specification Intel Order Number C11343-001 Revision 1.0 June 2002 Enterprise Platforms and Services Division Intel Order Number C11343-001...

  • Page 2: Revision History

    Intel may make changes to specifications and product descriptions at any time, without notice. ® The Intel SHG2 Server Board may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current characterized errata will be available on request.

  • Page 3: Table Of Contents

    Intel® SHG2 DP Server Board Technical Product Specification Table of Contents 1. Introduction... 1 SHG2 Architecture Overview... 2 Document Structure and Outline ... 4 2. Processor and Chipset ... 6 Overview... 6 Processor Support... 6 2.2.1 Processor Bus Termination/Regulation/Power ... 7 2.2.2 Miscellaneous Processor Subsystem Logic...
  • Page 4 3.6.2 IRQ scan for PCIIRQ ... 26 4. Clock Generation and Distribution ... 27 5. Server Management ... 29 Sahalee Baseboard Management Controller ... 30 System Reset Control... 31 Intel® SHG2 DP Server Board Technical Product Specification Intel Order Number C11343-001 Revision 1.0...
  • Page 5 Intel® SHG2 DP Server Board Technical Product Specification 5.2.1 Power-up Reset ... 31 5.2.2 Hard Reset... 32 5.2.3 Soft Reset ... 32 Intelligent Platform Management Buses... 33 6. Error Reporting and Handling ... 35 Error Sources and Types... 35 Handling and Logging System Errors ... 35 6.2.1 Logging Format Conventions ...
  • Page 6 8.10.5 Video Port ... 68 8.10.6 Ethernet Connectors ... 68 8.11 Connector Manufacturers and Part Numbers... 70 9. General Specifications... 72 Absolute Maximum Electrical and Thermal Ratings ... 72 Intel® SHG2 DP Server Board Technical Product Specification Intel Order Number C11343-001 Revision 1.0...
  • Page 7 Intel® SHG2 DP Server Board Technical Product Specification Airflow Specification for CIOB-X2 and CMIC-LE ... 73 Electrical Specifications... 73 9.3.1 Power Consumption... 73 9.3.2 Power Supply Specifications... 74 10. Mechanical Specifications... 78 11. Regulatory and Integration Information ... 80 11.1 Product Regulatory Compliance...
  • Page 8 List of Figures Intel® SHG2 DP Server Board Technical Product Specification List of Figures ® Figure 1. Intel SHG2 Server Board ... 1 Figure 2. SHG2 Server Board Placement Diagram ... 2 Figure 3. SHG2 Memory Bank Layout... 10 Figure 4. SHG2 Interrupt Routing (PIC Mode)... 24 Figure 5.
  • Page 9 Intel® SHG2 DP Server Board Technical Product Specification List of Tables Table 1. Memory DIMM Pairs... 10 Table 2. CSB5 GPIO Usage Table... 13 Table 3. Serial Port Connector Pinout ... 14 Table 4. Parallel Port Connector Pinout ... 15 Table 5.
  • Page 10 List of Tables Intel® SHG2 DP Server Board Technical Product Specification Table 31. Recovery BIOS POST Codes... 44 Table 32. POST Error Messages and Codes ... 45 Table 33. SHG2 Configuration Jumper Options ... 49 Table 34. SHG2 Baseboard Connectors ... 50 Table 35.
  • Page 11 Intel® SHG2 DP Server Board Technical Product Specification List of Tables Table 64. SHG2 Ripple and Noise Specification ... 74 Table 65. Voltage Timing Parameters ... 74 Table 66. Turn On/Off Timing... 75 Table 67. Transient Load Requirements ... 77 Revision 1.0...
  • Page 12 List of Tables Intel® SHG2 DP Server Board Technical Product Specification < This page intentionally left blank. > Intel Order Number C11343-001 Revision 1.0...

  • Page 13: Introduction

    Intel® SHG2 DP Server Board Technical Product Specification Introduction This chapter provides an architectural overview of the Intel functional blocks and the electrical relationships. Figure 1 shows the functional blocks of the SHG2 baseboard. P re s to n ia...

  • Page 14: Shg2 Architecture Overview

    SCSI bus speeds up to 160MB/sec with 7899 SCSI controller, one embedded 10/100 Network Interface Controller (NIC), one 10/100/1000 Gigabit Network Interface Controller, and a 2D/3D graphics accelerator. Intel® SHG2 DP Server Board Technical Product Specification +12V CPU Pwr Aux Sig...
  • Page 15 Server management and monitoring hardware are also included. These features, and the others listed below, make this one of the most highly integrated server boards in this class. SHG2 supports two interleaved memory channels at 100 MHz, each utilizing the rising edge and falling edge of the clock cycle for 200MT/s per channel (also known as “double pumped”)

  • Page 16: Document Structure And Outline

    Description of operational parameters and considerations, and other hardware specifications. Chapter 10: Mechanical Specifications Mechanical drawings of the Intel SHG2 Server Board. Intel® SHG2 DP Server Board Technical Product Specification C* addresses and block diagrams are provided. Intel Order Number C11343-001 Revision 1.0...
  • Page 17 Intel® SHG2 DP Server Board Technical Product Specification Introduction Chapter 11 Regulatory and Integration Information Revision 1.0 Intel Order Number C11343-001...

  • Page 18: Processor And Chipset

    I/O connection (IMB) to the PCI-X bridge (CIOB-X2) and a connection (Thin IMB) to the south bridge (CSB5) for legacy devices and the PCI segment. The server board supports up to 12 GB of ECC memory, using 2GB DDR-registered PC1600 or PC2100 SDRAM DIMMs.

  • Page 19: Processor Bus Termination/Regulation/Power

    This prevents system power on if an empty socket in the primary section is detected in the primary processor socket (labeled Proc1, located closest to the edge of the server board), thus preventing operation of the system with an improperly terminated AGTL+ processor bus.

  • Page 20: Serverworks* Grand Champion* Le Chipset

    3.2 GB per second of bandwidth in both directions concurrently. All I/O for the SHG2 server board, including PCI-X, is directed through the CMIC-LE and then through either the CIOB-X2 or the CSB5-provided 32-bit/33-MHz PCI bus.

  • Page 21: Memory Subsystem

    Intel® SHG2 DP Server Board Technical Product Specification Memory Subsystem Features provided in the SHG2 server board memory subsystem include the following: Six DIMM sockets, supporting three pairs of PC1600 (DDR200), upward compatible with PC2100 (DDR266) DIMMs. Memory can be implemented with either single-sided (one row) or double-sided (two row) DIMMs.

  • Page 22: Figure 3. Shg2 Memory Bank Layout

    DIMM 2A, DIMM 2B DIMM 3A, DIMM 3B DIMM Pair 3A/B DIMM Pair 2A/B DIMM Pair 1A/B Intel® SHG2 DP Server Board Technical Product Specification Table 1. Memory DIMM Pairs Memory DIMM DIMM PAIR Figure 3. SHG2 Memory Bank Layout...

  • Page 23: Ciob-X2

    PCI bus interface. In the SHG2 server board implementation, the CSB5’s primary role is to provide the gateway to all PC-compatible I/O devices and features. The SHG2 uses the following CSB5 features:...

  • Page 24: Pci Interface

    2.4.5 Compatibility Interrupt Control The CSB5 provides the functionality of two legacy 8259 programmable interrupt controller (PIC) devices, for ISA-compatible interrupt handling. Intel® SHG2 DP Server Board Technical Product Specification 29LV800TA-90PFTN Intel Order Number C11343-001 flash memory component. Revision 1.0...

  • Page 25: Power Management

    Intel® SHG2 DP Server Board Technical Product Specification 2.4.6 Power Management One of the embedded functions of CSB5 is a power management controller. The SHG2 server board uses this to implement ACPI-compliant power management features. The SHG2 supports four sleep states: S0, S1, S4, and S5.

  • Page 26: Revision

    When disabled, serial port interrupts are available to add-in cards. The serial port pinout is shown in Table 3. Intel® SHG2 DP Server Board Technical Product Specification Table 3. Serial Port Connector Pinout...

  • Page 27: Table 4. Parallel Port Connector Pinout

    Intel® SHG2 DP Server Board Technical Product Specification 2.5.1.2 Parallel Port The SHG2 baseboard provides a 25-pin parallel port connector. The SIO provides an IEEE 1284-compliant, 25-pin bi-directional parallel port. BIOS programming of the SIO registers enables the parallel port and determines the port address and interrupt. When disabled, the interrupt is available to add in adapters.

  • Page 28: Table 6. Keyboard Connector Pinout

    Keyboard Clock (NC) 2.5.1.5 GPIO The PC PC87417VLA provides several of the GPIO pins that the SHG2 server board utilizes. Table 8 identifies the pin, the signal name specified in the schematic, and a brief description of its usage. Usage 1,2,3 PKG_SELECT<1-3>...
  • Page 29 Intel® SHG2 DP Server Board Technical Product Specification Processor and Chipset management events, the BMC, or the front panel. This circuitry is powered from stand-by voltage, which is present anytime the system is plugged into an AC outlet. Revision 1.0...

  • Page 30: Baseboard Pci I/O Subsystem

    Baseboard PCI I/O Subsystem Overview The I/O buses for the Intel SHG2 server board are both PCI-X and PCI, with one PCI and two PCI-X bus segments or peers. All the PCI (-X) buses comply with the PCI Local Bus Specification, Revision 2.2 and PCI-X Specification, Revision 1.0a.

  • Page 31: 64/100Mhz Pci-X Arbitration

    Intel® SHG2 DP Server Board Technical Product Specification 3.2.2 64/100MHz PCI-X Arbitration A 64/100MHz segment supports three PCI (-X) masters: slots PCIX-1 (64/100), PCIX-2 (64/100), and 82544GC Gigabit Ethernet Controller. All PCI (-X) masters must arbitrate for PCI (-X) access, using resources supplied by the CIOB-X2. The host bridge PCI (-X) interface (CIOB-X2) arbitration lines REQx* and GNTx* are a special case in that they are internal to the host bridge.

  • Page 32: Ultra 160 Scsi Controller (Adaptec* Aic- 7899)

    266MB/s at 66MHz, and at 133MB/s at 33MHz. Modular RAID Capable PCI Slot 6 The SHG2 server board supports modular RAID controller on PCI (X) Slot 6. An add-in card installed in this slot leverages the on-board SCSI controller along with its own built-in intelligence to provide a complete RAID controller subsystem on board.

  • Page 33: Device Ids (Idsel)

    Intel® SHG2 DP Server Board Technical Product Specification PCI 82550PM Network Interface Controller. 3.5.1 Device IDs (IDSEL) Each device under the PCI host bridge has its IDSEL signal connected to one bit of AD[31::16], which acts as a chip select on the PCI bus segment in configuration cycles. This determines a unique PCI device ID value for use in configuration cycles.

  • Page 34: Video Controller

    3.5.4 Video Controller The Intel SHG2 server board provides an ATI Rage XL PCI graphics accelerator, along with 8 MB of video, SDRAM, and support circuitry for an embedded super video graphics array (SVGA) video subsystem. The ATI Rage XL chip contains a SVGA video controller, clock generator, 2D and 3D engine, and RAMDAC in a 272-pin PBGA.

  • Page 35: Interrupt Routing

    Intel® SHG2 DP Server Board Technical Product Specification 640x480 60,72,75,90,100 800x600 60,70,75,90,100 1024x768 60,72,75,90,100 1280x1024 43,60,70,72 1600x1200 60,66,76,85 3D Mode Refresh Rate (Hz) 640x480 60,72,75,90,100 800x600 60,70,75,90,100 1024x768 60,72,75,90,100 1280x1024 43,60,70,72 1600x1200 60,66,76,85 3.5.4.2 VGA Connector Table 17 shows the pinout of the VGA connector. For more information, see the ATI RAGE XL Technical Reference Manual.

  • Page 36: Figure 4. Shg2 Interrupt Routing (Pic Mode)

    Slot1intD,Slot2intC,Slot3intB, PIRQ12 Slot4intC,Slot5intB Slot1intB,Slot2intD,Slot3intC, PIRQ13 Slot4intD,Slot5intC,Slot6intB Slot1intC,Slot2intB,Slot3intD, PIRQ14 Slot4intB,Slot5intD PIRQ 15 Figure 4. SHG2 Interrupt Routing (PIC Mode) Intel® SHG2 DP Server Board Technical Product Specification CSB5 SCAN IRQ Keyboard Serial Port2 Serial Port1 ESMINT Parallel Port ESMINT ESMINT Mouse...

  • Page 37: Figure 5. Shg2 Interrupt Routing (Symmetric Mode)

    Intel® SHG2 DP Server Board Technical Product Specification SLOT Figure 5. SHG2 Interrupt Routing (Symmetric Mode) Revision 1.0 (Cascade Connection) CoprocessorErr Intel Order Number C11343-001 Baseboard PCI I/O Subsystem Timer IRQ0 IRQ1 IRQ2 IRQ3 SIO2 IRQ4 SIO1 ESMINT IRQ5 Floppy...

  • Page 38: Serialized Irq Support

    The SHG2 baseboard has a total of 16 PCIIRQs that are connected through an external PCI interrupt serializer for PCIIRQ scan mechanism, which then serializes the PCIIRQ orders into the CSB5 IRQ/data frame structure. Intel® SHG2 DP Server Board Technical Product Specification Intel Order Number C11343-001 Revision 1.0...

  • Page 39: Clock Generation And Distribution

    Intel® SHG2 DP Server Board Technical Product Specification Clock Generation and Distribution All buses on the Intel SHG2 server board operate using synchronous clocks. Clock synthesizer/driver circuitry on the baseboard generates clock frequencies and voltage levels as required, including the following: 100 MHz at 2.5 V logic levels - for CPU1 and CPU2, the CMIC-LE, memory buffer, and...

  • Page 40: Figure 6. Shg2 Baseboard Clock Distribution

    DIMM SLOT B3 100 MHz OTHER CLOCKS: 40 MHz Crystal 32.768 MHz Crystal 25 MHz Figure 6. SHG2 Baseboard Clock Distribution Intel® SHG2 DP Server Board Technical Product Specification PCI CLOCK: CPU1 CPU2 CMIC-LE MEM CLK BUF CLOCK CSB5 / VGA BUFFER...

  • Page 41: Server Management

    Intel® SHG2 DP Server Board Technical Product Specification Server Management The SHG2 server management features are implemented using the Sahalee BMC chip. The Sahalee BMC is an ASIC packaged in a 156-pin BGA that contains a 32-bit reduced instruction set computing (RISC) processor core and associated peripherals. Figure 7 illustrates the SHG2 server management architecture.

  • Page 42: Sahalee Baseboard Management Controller

    Temperature is measured on each of the processors and at locations on the server board away from the fans. When any monitored parameter is outside of defined thresholds, the Sahalee BMC logs an event in the System Event Log (SEL).

  • Page 43: System Reset Control

    Secondary processor socket thermal sensor System Reset Control Reset circuitry on the Intel SHG2 server board looks at resets from the front panel, CSB5, in- target probe (ITP), and the processor subsystem to determine proper reset sequencing for all types of resets. The reset logic is designed to accommodate a variety of ways to reset the...

  • Page 44: Hard Reset

    Front Panel Connector debounce BASEBO ARD MANAG EMENT CO NTROLLER Pw r PSON Conn PW RGD Intel® SHG2 DP Server Board Technical Product Specification Power button R eset button S leep button logic Pgood logic CPURST (BMC) Reset out CM IC-...

  • Page 45: Intelligent Platform Management Buses

    Platform Management Bus Communications Protocol Specification, provide an independent interconnect for all devices operating on this I The IPMB extends throughout the server board and system chassis. An added layer in the protocol supports transactions between multiple servers on inter-chassis I...

  • Page 46: Table 23: Private I

    0xC1, 0x31 PC87417 SIO 3 VSB 0x60 Function Voltage NIC1 (82550PM) 3 VSB 0x84 Intel® SHG2 DP Server Board Technical Product Specification Table 23: Private I C* Bus 3 Devices Address 0xBC, 0xAC 0xB0, 0xA0 0xB1, 0xA1 0xB2, 0xA2 0x58...

  • Page 47: Error Reporting And Handling

    Intel® SHG2 DP Server Board Technical Product Specification Error Reporting and Handling This section defines how errors are handled by the system BIOS on the Intel SHG2 server board. Also discussed is the role of BIOS in error handling, and the interaction between the BIOS, platform hardware, and server management firmware with regard to error handling.

  • Page 48: Table 26. Bios Logging Sel List

    10 = OEM code in byte 3 11 = Sensor specific event extension code in byte 3 Offset from Event Trigger for discrete event state Intel® SHG2 DP Server Board Technical Product Specification Table 26. BIOS Logging SEL List Sensor...

  • Page 49: System Management Interrupt (Smi) Handler

    System Management Interrupt (SMI) Handler The SMI handler is used to handle and log system level events that are not visible to the server management firmware. The SMI handler will preprocess all system errors; this includes errors that are normally considered to generate an NMI. The SMI handler sends a command to the...

  • Page 50: Boot Event

    FRB level 2 is intended to recover from a watchdog timeout during POST. The watchdog timer for FRB level 2 is implemented in the Sahalee BMC. Intel® SHG2 DP Server Board Technical Product Specification Intel Order Number C11343-001 Revision 1.0...

  • Page 51: Error Messages And Error Codes

    Intel® SHG2 DP Server Board Technical Product Specification FRB level 3 is intended to recover from a watchdog timeout on hard reset or power-up. The Sahalee BMC provides hardware functionality for this level of FRB. 6.4.3.1 FRB-1 In a multiprocessor system, the BIOS registers the application processors in the multi- processor (MP) table and the ACPI APIC tables.

  • Page 52: Alert Standard Forum (Asf) Progress Codes

    POST checks point code as seen by a ‘port 80h’ card and LCD. For example, if an error occurs at checkpoint 22h, a beep Intel® SHG2 DP Server Board Technical Product Specification Description At beginning of ECC initialization or memory test.

  • Page 53: Table 30. Standard Bios Post Codes

    Intel® SHG2 DP Server Board Technical Product Specification code of 1-3-1-1 is generated. The dash between the numbers defines an audible pause that delimits the sequence. POST codes will occur prior to the video display being initialized. To assist in determining the fault, a unique beep-code is derived from these checkpoints as follows: 1.
  • Page 54 Display shadow message Display non-disposable segments Display error messages Check for configuration errors Test real-time clock Check for keyboard errors Test for key lock on Intel® SHG2 DP Server Board Technical Product Specification Reason Intel Order Number C11343-001 Revision 1.0...
  • Page 55 Intel® SHG2 DP Server Board Technical Product Specification Beeps Set up hardware interrupt vectors Intelligent system monitoring Test coprocessor if present Detect and install external RS232 ports Initialize PC-compatible PnP ISA devices Re-initialize on board I/O ports Initialize BIOS Data Area...

  • Page 56: Post Error Codes And Messages

    Some of the error messages are preceded by the string, ‘Error‘, to indicate that a system that might be malfunctioning. All POST errors and warnings are logged in the SEL unless it is full. Intel® SHG2 DP Server Board Technical Product Specification Reason Table 31. Recovery BIOS POST Codes...

  • Page 57: Table 32. Post Error Messages And Codes

    Intel® SHG2 DP Server Board Technical Product Specification Table 32. POST Error Messages and Codes Code Error Message 0200: Failure Fixed Disk 0210: Stuck Key 0211: Keyboard error 0212: Keyboard Controller Failed 0213: Keyboard locked– Unlock key switch 0220: Monitor type does not match CMOS– Run SETUP...

  • Page 58: Liquid Crystal Display (Lcd)

    The BIOS generates an LCD message during POST and as a result of errors handled by the BIOS SMI handler. Unless the LCD has been forcibly reserved by software (via Intel® SHG2 DP Server Board Technical Product Specification Failed Processor 2 because an error was detected.
  • Page 59 Intel® SHG2 DP Server Board Technical Product Specification the LCD Display Control command), a BIOS message will override a software message written to the BIOS area. Normally, the BIOS will use the BIOS LCD Message command that will cause the BMC to display a BMC-stored message in the BIOS message area (first line) of the LCD.

  • Page 60: Jumpers

    Jumpers Jumpers Hardware Configuration This section describes jumper options on the baseboard. The SHG2 server board has 10 jumpers to control various configuration options. CN58 CN53 Intel® SHG2 DP Server Board Technical Product Specification CN57 CN56 Figure 9. Jumper Location...

  • Page 61: Table 33. Shg2 Configuration Jumper Options

    Intel® SHG2 DP Server Board Technical Product Specification Table 33. SHG2 Configuration Jumper Options Location Pins Feature CN43 CMOS Clear Password Clear Reserved Reserved 9-10 Recovery Bios 11-12 Dummy CN27 Bios Write Protect BMC Write Protect CN53 PCIX1_DIS(Primary) PCIX2_DIS(Secondary) Set: 66MHz...

  • Page 62: Connections

    Connector Name / ID SCSI channel A LVDS connector (CN54) SCSI channel B LVDS connector (CN55) HSBP-A&B connector (CN50, CN52) Intel® SHG2 DP Server Board Technical Product Specification Connector Name / ID Legacy Floppy connector (CN31) Processor #2 socket (U36)

  • Page 63: Power Distribution Board Interface Connector

    Intel® SHG2 DP Server Board Technical Product Specification IPMB connector (CN44) Front Panel header (CN37) Primary IDE connector (CN38) Secondary IDE connector (CN34) Power Distribution Board Interface Connector CN6 / CN7 / CN4 [Key - M & K & L] The SHG2 baseboard receives its main power through two primary and one auxiliary power connector.

  • Page 64: Scsi Connectors

    +DT(4) +DT(5) +DT(6) +DT(7) +DTP(0) GROUND DIFFSNS TERMPWR TERMPWR RESERVED GROUND +ATN Intel® SHG2 DP Server Board Technical Product Specification C* Bus CN4 [Key-L] Signal RETURN_S +3.3V CN54 & CN55 [Key-A & B] Connector Signal Name Contact Number +ACK +RST...

  • Page 65: Floppy Connector

    Intel® SHG2 DP Server Board Technical Product Specification Connector Signal Name Contact Number GROUND +BSY Floppy Connector CN31 [Key-H] Table 39 details the pin-out of the 34-pin Legacy floppy connector. Table 39. Legacy 34-pin Floppy Connector Pin-out Ground Ground Ground...

  • Page 66: Ide Connectors

    IOCHRDY DDACK0 (DDACK1)# IRQ14 (IRQ15) DAG1 DAG0 Chip Select 0P (0S)# Reserved (Activity#) Intel® SHG2 DP Server Board Technical Product Specification CN38 & CN34 [Key-F & G] Signal Name Ground Host Data 8 Host Data 9 Host Data 10 Host Data 11...

  • Page 67: Front Panel Interface

    Intel® SHG2 DP Server Board Technical Product Specification Front Panel Interface CN37 [Key-E] A 34-pin header is provided that attaches to the system front panel. The header contains reset, NMI, sleep, and power control buttons, and LED indicators. Table 41 summarizes the front panel signal pins, including the pin number, signal mnemonic, and a brief description.

  • Page 68: Processor Connector

    A20# A14# A10# Reserved Reserved LOCK# HITM# Reserved No Connect No Connect Intel® SHG2 DP Server Board Technical Product Specification ® Xeon™ Processor Connector Pinout CPU1 & CPU2 [Key-J & I] Signal No Connect No Connect No Connect VID0 BPM3#...
  • Page 69 Intel® SHG2 DP Server Board Technical Product Specification Pin † Signal Reserved VID4 No Connect OTDEN A31# A27# A21# A22# A13# A12# A11# REQ0# REQ1# REQ4# LINT0 PROCHOT# VCCSENSE No Connect No Connect No Connect VID3 Reserved RSP# A35# A34# A30# Revision 1.0...
  • Page 70 STPCLK# INIT# MCERR# AP1# BR3# A29# A25# A18# A17# ADS# BR0# RS1# Intel® SHG2 DP Server Board Technical Product Specification Signal No Connect No Connect No Connect No Connect No Connect No Connect No Connect No Connect No Connect Reserved...
  • Page 71 Intel® SHG2 DP Server Board Technical Product Specification Pin † Signal BPRI# Reserved VSSSENSE No Connect No Connect No Connect VID1 BPM5# IERR# BPM2# BPM4# AP0# BR2# A28# A24# COMP1 DRDY# TRDY# RS0# HIT# FERR# Notes: † Pins are numbered with respect to the 604-pin grid array ZIF connector. The grid originates at the upper left corner of the socket and is numbered with columns 1 through 31 along the top, and letters A through AE (without I, O, Q, S, X, or Z) down the side.

  • Page 72: System Management Interfaces

    It also provides a mechanism for chassis power control. As an option, the server can be configured with an ICMB adapter board to provide two RJ45 8-pin connectors to allow daisy-chained cabling. Additional information about the ICMB can be found in the External Intelligent Management Bus Bridge External Program Specification.

  • Page 73: Baseboard Fan Connectors

    BMC. The sensor pins for all of these fans are routed to the BMC for failure monitoring Figure 11 shows the fan connector locations on the SHG2 server board, and indicates the corresponding types of fan.

  • Page 74: Figure 12. Shg2 System Redundant Cooling Fan Support

    FAN 2 CN 22 CN 23 FAN 2 to CN22 I/O Cooling Zone Figure 12. SHG2 System Redundant Cooling Fan Support Intel® SHG2 DP Server Board Technical Product Specification CN 1 CN 18 CN 28 CN 36 Fan headers CN 41...

  • Page 75: Fan Connector Pin-Out

    Intel® SHG2 DP Server Board Technical Product Specification SHG2 Baseboard Area Cooled Location Core Cooling Zone Back Front I/O Cooling Zone Front Processors Note: For the KHD3HSRP650 Chassis, processor cooling is implemented via ducted Fans 1, 2 & 5 in the core cooling zone rather than using processor wind tunnels (PWT) .

  • Page 76: 8.10 Standard I/O Panel Connectors

    A post production ECO is planned to change the orientation of these connectors. Table 47 lists and identifies each of the connectors. Figure 13. SHG2 I/O Panel Connector Graphical Locations Intel® SHG2 DP Server Board Technical Product Specification Intel Order Number C11343-001 Revision 1.0...

  • Page 77: Universal Serial Bus (Usb) Interface

    Intel® SHG2 DP Server Board Technical Product Specification Connector Name USB connector, port C USB connector, port B USB connector, port A USB connector, port D Mouse (Keyboard) connector Keyboard (Mouse) connector 8.10.1 Universal Serial Bus (USB) Interface [Key A, B & C] The baseboard provides three stacked USB ports (Port 2 on top, Port 0 in middle, Port 1 on bottom).

  • Page 78: Mouse And Keyboard Ports

    Ground 8.10.3 Serial Ports [Key-F & L] The SHG2 server board provides one RS-232C serial port and a second serial port available through an onboard header [Key L]. The back panel serial port is a D- subminiature 9-pin connector. SIODCD + 00_1 (carrier detect) SIORXD –...

  • Page 79: Parallel Port

    The COM2 serial port can be used either as an emergency management port (EMP) or as a normal serial port. As an EMP, COM2 is used as a communication path by the Server Management RS-232 connection to the BMC. This port can provide a level of emergency management through an external modem.

  • Page 80: Video Port

    The 82550PM drives LEDs on the network interface connector that indicate transmit/receive activity on the LAN, a valid link to the LAN, and 10- or 100-Mbps operation. The green LED Intel® SHG2 DP Server Board Technical Product Specification Table 54. Video Connector...

  • Page 81: Figure 14. Shg2 I/O Panel Connector Location Dimensions

    Intel® SHG2 DP Server Board Technical Product Specification indicates network connection when illuminated, and TX/RX activity when blinking. When the SPEED LED is OFF, it indicates network connection at 10Mbps; a green LED indicates 100- Mbps operation when illuminated. SPEED LED Color...

  • Page 82: 8.11 Connector Manufacturers And Part Numbers

    Tyco Electronics Corporation Floppy CONN, HDR, 2 X 17, PLG, VT, 0.1, 062ST, KP 5, S Foxconn Electronics, Inc. Tyco Electronics Corporation Intel® SHG2 DP Server Board Technical Product Specification Description / Manufacturer Intel Order Number C11343-001 Item Number 0442060001...
  • Page 83 Intel® SHG2 DP Server Board Technical Product Specification Interface Definition Foxconn Electronics, Inc. Tyco Electronics Corporation Molex Connector Corporation Primary and CONN, HDR, 2 X 20, PLG, VT, 0.1, 062ST, KP 20 Secondary ATA Foxconn Electronics, Inc. Tyco Electronics Corporation Foxconn Electronics, Inc.

  • Page 84: General Specifications

    Absolute Maximum Electrical and Thermal Ratings Operation of the SHG2 server board at conditions, beyond those shown in the following table, may cause permanent damage to the system (provided for stress testing only). Exposure to absolute maximum rating conditions for extended periods may affect system reliability.

  • Page 85: Airflow Specification For Ciob-X2 And Cmic-Le

    Intel® SHG2 DP Server Board Technical Product Specification Airflow Specification for CIOB-X2 and CMIC-LE The maximum thermal specifications for components listed require installation of a heat sink or maintenance of a minimum level of airflow. Failure to maintain sufficient cooling airflow will result in components exceeding maximum case temperature.

  • Page 86: Power Supply Specifications

    All main outputs must be within regulation of vout_on each other within this time. All main outputs must leave regulation within vout_off this time. Intel® SHG2 DP Server Board Technical Product Specification +3.168 +3.30 +3.46 +4.80 +5.00 +5.25 +11.52 +12.00...

  • Page 87: Figure 15. Output Voltage Timing

    Intel® SHG2 DP Server Board Technical Product Specification Vout 10% Vout Table 66 shows the timing requirements for the power supply being turned on and off via the AC input with PSON held low, and the power supply being turned on and off with the PSON signal after AC input is applied.

  • Page 88: Figure 16. Turn On/Off Timing

    1. Voltage shall remain within +/- 5% of the nominal set voltage on the +5 V, +12 V, 3.3 V, -5 V and –12 V outputs, during instantaneous changes in load shown in the table below. Intel® SHG2 DP Server Board Technical Product Specification Description...

  • Page 89: Table 67. Transient Load Requirements

    Intel® SHG2 DP Server Board Technical Product Specification 2. Voltage regulation limits shall be maintained over the entire AC input range and any steady state temperature and operating conditions specified. 3. Voltages shall be stable as determined by bode plot and transient response. The combined error of peak overshoot, set point, regulation, and undershoot voltage shall be less than or equal to +/-5% of the output voltage setting.

  • Page 90: 10. Mechanical Specifications

    Mechanical Specifications Intel® SHG2 DP Server Board Technical Product Specification 10. Mechanical Specifications The following diagrams show the mechanical specifications of the SHG2 server baseboard. All dimensions are given in inches, and are dimensioned per ANSI Y15.4M. Connectors are dimensioned to pin 1.

  • Page 91: Figure 18. Shg2 Baseboard Mechanical Diagram 2

    Intel® SHG2 DP Server Board Technical Product Specification Mechanical Specifications Figure 18. SHG2 Baseboard Mechanical Diagram 2 Revision 1.0 Intel Order Number C11343-001...

  • Page 92: 11. Regulatory And Integration Information

    11.1.2 Product EMC Compliance The SHG2 Server Board has been tested and verified to comply with the following electromagnetic compatibility (EMC) regulations when installed in a compatible Intel host system. For information on compatible host system(s), contact your local Intel representative.

  • Page 93: Australian Communications Authority (Aca) (C-Tick Declaration Of Conformity)

    11.3 Replacing the Back up Battery The lithium battery on the server board powers the RTC for up to 10 years in the absence of power. When the battery starts to weaken, it loses voltage, and the server settings stored in CMOS RAM in the RTC (for example, the date and time) may be wrong.
  • Page 94 Kassera använt batteri enligt fabrikantens instruktion. VAROITUS Paristo voi räjähtää, jos se on virheellisesti asennettu. Vaihda paristo ainoastaan laitevalmistajan suosittelemaan tyyppiin. Hävitä käytetty paristo valmistajan ohjeiden mukaisesti. Intel® SHG2 DP Server Board Technical Product Specification Intel Order Number C11343-001 Revision 1.0...

  • Page 95: Appendix A: Glossary

    Intel® SHG2 DP Server Board Technical Product Specification Term AGTL+ Assisted Gunning Transceiver Logic + Application Processor APIC Advanced Programmable Interrupt Controller Alert Standard Forum Asynchronous System Reset Ball-Grid Array BIST Built-In Self Test Baseboard Management Controller Bootstrap Processor CIOB-X2...
  • Page 96 Super Video Graphics Array Test Access Port To Be Determined Thin-IMB Thin-Intra Module Bus Universal Serial Bus Video Graphics Array Voltage Regulator Module Zero Channel RAID Zero Insertion Force Intel® SHG2 DP Server Board Technical Product Specification Intel Order Number C11343-001 Revision 1.0...
  • Page 97 Intel® SHG2 DP Server Board Technical Product Specification Appendix B: Reference Documents Refer to the following documents for additional information: Foster Processor Electrical, Mechanical, and Thermal Specification Rev 1.5 ServerWorks Champion Memory & I/O Controller-Low End (CMIC-LE) Specification Rev ServerWorks Champion South Bridge (CSB5) Specification Rev 2.0 ServerWorks Champion IO Bridge (CIOB-X2) Specification Rev 1.3...

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