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Tsi384
Evaluation Board User Manual
60E1000_MA001_08
September 2009
6024 Silver Creek Valley Road, San Jose, California 95138
Telephone: (800) 345-7015 • (408) 284-8200 • FAX: (408) 284-2775
Printed in U.S.A.
©2009 Integrated Device Technology, Inc.

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Summary of Contents for IDT Tsi84

  • Page 1 ® Tsi384 ™ Evaluation Board User Manual 60E1000_MA001_08 September 2009 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: (800) 345-7015 • (408) 284-8200 • FAX: (408) 284-2775 Printed in U.S.A. ©2009 Integrated Device Technology, Inc.
  • Page 2 Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. IDT does not assume any responsibility for use of any circuitry described other than the circuitry embodied in an IDT product. The Company makes no representations that circuitry described herein is free from patent infringement or other rights of third parties which may result from its use.
  • Page 3: Table Of Contents

    J2-J36-J37 Connectors ............. . 32 Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 4 Bill of Materials ........... . . 37 Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 5: About This Document

    SerDes Serial/De-serializer Revision History 60E1000_MA001_08, Formal, September 2009 This document was rebranded as IDT. It does not include any technical changes. 60E1000_MA001_07, Formal, May 2008 The following changes were made to this version: • Completed various changes in response to the Tsi384 evaluation board’s removal of support for an external arbiter (see “Arbitration”).
  • Page 6 Add 10 K Ohm pull-down to PCI_RST# 60E1000_MA001_03, Formal, April 2007 This is the general release version of the document. There are no technical differences between this document and the previous version. Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 7 60E1000_MA001_01, Formal, March 2007 This is the first version of the Tsi384 Evaluation Board User Manual. This document supports the Revision 1.0, Assembly number E1000_AS001_01 version of the Tsi384 evaluation board. Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 8 About this Document Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 9: Board Design

    Single x4 lane, 2.5 Gbps PCIe 1.1 compatible riser card (extended height form factor) • Three PCI/X slots • 32-/64-bit PCI/X bus, 25–133 MHz operation • PCI/X power support through system or external supply • PCIe compliance/debugging test points Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 10: Pci/X Interface

    All PCI/X connectors are compliant with the PCI/X 2.0b specification. Appropriate clearance is provided such that up to three PCI/X cards can be inserted for testing while the board is in an open-chassis standard ATX case. Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 11: Idsel Signals

    1.2.3 Interrupt Signals The PCI interrupt signals are connected to the slots as shown in Table Table 2: PCI Interrupt Routing Tsi384 Slot 0 Slot 1 Slot 2 Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 12: Pci Pull-Up Signals

    Supports Hot insertion and removal • Mid-bus logic analyzer pads for PCIe RXD/TXD signal probing • AC coupling on the TXD lanes • JTAG TDI - TDO loopback for chain continuity Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 13: Power Management

    Power rules regarding x4 PCIe slots are a maximum of 25W slot. Current limits are included in Table Table 5: PCIe Connector Current Limits Rail Current 3.3V 2.1A Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 14 Table 7: PCI/X Connector Current Limit with No External Supply Rail Supplying Topology Current (Maximum) 3.3V 12V to 3.3V regulator 12V directly 500mA -12V 12V to 5V regulator Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 15: Power Sequencing

    • 3.3V Tsi384 I/O/PCIe A • 1.2V Tsi384 Core/PCIe V 2. ATX 20-pin connector override, which disables all power draw from the PCIe system 3. Current sensing of Tsi384 supplies Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 16: Clock Management

    Master – When in master mode, the Tsi384 generates the required PCI/X clock for all slots. • Slave – When in slave mode, an on-board selectable 25–133 MHz clock generator is used as follows: Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 17: System Clock Distribution

    PCIe System PCIe_REFCLK ICS557-01 PCIe_SYS_CLK Config ICS87604I PCI_EXT_CLK[0:3] PCIe_GEN_CLK ANALOG Tsi384 Passive PCI_FBK_CLK PCIe_REF_CLK PCI_CLK Passive Mux (AC coupled) (0r0 RES) (0r0 RES) CLKOUT[0:4] PCI_INT_CLK[0:2,4] Diff. PCIe_BERT_CLK Input PCI_CLK[0:2] PCI/X Connectors Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 18: Other Interfaces

    To access the PCI/X bus, a Nexus PCI/X interposer card can be used with Tektronix mictor cables. The card can be plugged into any PCI edge slot, or in-line with the device under test. Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 19: Configurable Options

    DIP Switches Switches S1 to S6 combine four, small slide switches identified with numbers 1 to 4 (see Table 8 individual switch definition). Figure 5: DIP Switch Package/Individual Switch Position Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 20 2. Configurable Options Figure 6: Switch Locations S1 S2 Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 21 PCIXCAP = Low PCI 50 MHz M666EN = High PCI_SEL100 = High ON - x - OFF - ON PCIXCAP = Low PCI 66 MHz M666EN = High PCI_SEL100 = Low Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 22 Note that S1 and S2 operate together. When the S2 switches are ON, the S1 setting applies to the whole bus. For example, when PCIXCAP is connected to the Tsi384 (S2.4 ON), and PCIXCAP is forced to ground (S1.1 ON), the whole bus will see PCIXCAP low. Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 23 0,1,1,0 = x 2.667 0,1,1,1 = x 1.33 1,0,0,0 = x 6.667 1,0,0,1= x 5 1,0,1,0= x 3.33 1,0,1,1= x 1.67 1,1,0,0= x 8 1,1,0,1= x 6 1,1,1,0= x 4 1,1,1,1= x 2 Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 24 ON = On-board PCIe clock multiplexer disabled. multiplexer OFF = On-board PCIe clock multiplexer enabled. enable PCIe clock ON = On-board PCIe reference clock is used. source select OFF = System PCIe reference clock is used. Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 25: Push Button

    ATX power supply. SW2 is used to reset the evaluation board. When pushing the reset button, the board is reset the same way a PCIe system reset would reset the board. Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 26: Shunt Jumpers

    2. Configurable Options Shunt Jumpers Shunt jumpers are used to control special features on the board (see Figure 7). These jumpers are explained in the following sub-sections. Figure 7: Shunt Jumper Location Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 27: J1 Shunt Jumper

    Normal operation, ATX power supply is turned On/OFF from push button. 2.2.3 J21 Shunt Jumper J21 is used to force the Tsi384 into a special debug mode. This jumper is not installed. Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 28: Debug Headers

    2. Configurable Options Debug Headers Debug headers are used to connect to signals on the board. This section provides header pinouts. Figure 8: Debug Header Location Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 29: J22 Tsi384 Jtag

    2. Configurable Options 2.3.1 J22 Tsi384 JTAG Table 18: J22 Pin Assignment Number Signal Assignment J22 Pin Location 3.3V 3.3V Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 30: J23 Logic Analyzer Pads

    J23 Logic Analyzer PADs Table 19: J23 Pin Assignment Number Signal Assignment J23 Pin Location PCIE_TXD_EDG_P0 PCIE_TXD_EDG_N0 PCIE_RXD_EDG_P0 PCIE_RXD_EDG_N0 PCIE_TXD_EDG_P1 PCIE_TXD_EDG_N1 PCIE_RXD_EDG_P1 PCIE_RXD_EDG_N1 PCIE_TXD_EDG_P2 PCIE_TXD_EDG_N2 PCIE_RXD_EDG_P2 PCIE_RXD_EDG_N2 PCIE_TXD_EDG_P3 PCIE_TXD_EDG_N3 PCIE_RXD_EDG_P3 PCIE_RXD_EDG_N3 Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 31: J38 Cpld Jtag

    2. Configurable Options 2.3.3 J38 CPLD JTAG Table 20: J38 Pin Assignment Pin# Signal Assignment J38 Pin Location 3.3V Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 32: Connectors

    J2-J36-J37 Connectors J2, J36, and J37 are used to connect a plug-in card to the Tsi384’s PCI/X Interface. The connectors’ pin assignments is as per the PCI standard for 64-bit connectors Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 33: J3 Atx Power Connector

    P1 x4 PCIe Finger Connector The pin assignment for the finger connector is as per the PCIe standard. Note that the JTAG signals TDI and TDO are connected together on the board. Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 34: Leds

    2. Configurable Options LEDs Figure 10: LED Location D2-D8 D24 D25 D11-D18 D19-D22 Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 35 ON when 12V rail is active 3.3V_PCI ON when 3.3V rail on the PCI bus is active External arbiter ON when external PCI/X arbiter is active External arbiter ON when in PCI/X mode Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 36 2. Configurable Options Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 37: Bill Of Materials

    X5R CER SMT, 100UF, 20%, 6.3V, 1210 C78-79, C81-82 C50,C178, C197,C199, 0603ZD105KAT2A CAPC0603 X5R CER SMT, 1UF, 10%, 10V, 0603 C225,C231 C85,C99 ECJ-0EB1C104K PANASONIC CAPC0402 X5R CER SMT, 100NF, 10%, 16V, CAPC0402 Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 38 J36-37 145165-4 145165-4 PCI MOTHERBOARD, 64BIT, 3.3V, THRU 67997-110 67997-110H 2X5, 0.1IN HDR COILCRAFT LPS4018 2.2UH SMT POWER INDUCTOR, 2.5A ISAT, .070ESR X4PCIE_FINGER_ X4PCIE_FINGER_ PCIE X4 FINGER CONNECTOR CONNECTOR CONNECTOR Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 39 RES SMT, 15.0K OHM, 0.1W, 1%, 0603 ERJ-3EKF1372V PANASONIC RESC0603 RES SMT, 13.7K OHM, 0.1W, 1%, 0603 R102,R149, R181, ERJ-2GE0R00X PANASONIC RESC0402 RES SMT, 0 OHM, 0.063W, 5%, 0402 R199-206, R255,R268, R270 Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 40 PUSHBUTTON SWITCH, 0.5 X EVQPAC07K PANASONIC SW_EVQPAC07K PUSHBUTTON SWITCH TP1-6 TESTPOINT MM74HC74AM FAIRCHILD SOIC127P6-14 DUAL D-TYPE FLIP-FLOP WITH PRESET AND CLEAR U2-3,U32 LMC7221BIM5 NATIONAL SOT23-5 CMOS COMPARATOR, R-TO-R INPUT, OPEN DRAIN OUTPUT Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 41 0.8 TO VIN OUT U34-36 QS34XVH245Q3 QVSOP-80 32-BIT FET BUS SWITCH EPM240T100C3 ALTERA VQFP50P16X16-1 CPLD, 240 MACROCELL Y1-2 HCM4925.000MA CITIZEN XTAL_HCM4925_ 25MHZ CRYSTAL, 18PF, 30PPM 000MABJT CAL. TOL., 50PPM TEMP. TOL. Integrated Device Technology Tsi384 Evaluation Board User Manual www.idt.com 60E1000_MA001_08...
  • Page 42 3. Bill of Materials Tsi384 Evaluation Board User Manual Integrated Device Technology 60E1000_MA001_08 www.idt.com...
  • Page 43 Performance specifications and the operating parameters of the described products are determined in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others.

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