Chapter 2. Hardware Architecture - IBM p5 590 System Handbook

Hardware architecture
Chapter 2.
This chapter reviews the contents in Chapter 1, "System overview" on page 1,
but provides deeper technical descriptions of the topics, including hardware
architectures that are implemented in the p5-590 and p5-595 servers, the
POWER5 processor, memory subsystem, and I/O subsystem in the following
topics:
Section 2.1, "Server overview" on page 18
Section 2.2, "The POWER5 microprocessor" on page 18
Section 2.3, "Memory subsystem" on page 26
Section 2.4, "Central electronics complex" on page 30
Section 2.5, "System flash memory configuration" on page 36
Section 2.6, "Vital product data and system smart chips" on page 36
Section 2.7, "I/O drawer" on page 37
© Copyright IBM Corp. 2005. All rights reserved.
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