IBM p5 590 System Handbook page 45

standards, such as special ways to reduce junction temperatures to reach a
high level of availability. The full system design approach is required to
maintain balanced utilization of hardware resources and high availability of
the new Sserver p5 systems.
Memory and CPU sharing, a dual clock, and dual service processors with
failover capability are examples of the full system design approach for high
availability. IBM designed the Sserver p5 system processor, caching
mechanisms, memory allocation methods, and full ECC support for buses
between chips inside a POWER5 system for performance and availability. In
addition, advanced error correction and low power consumption circuitry is
improved with thermal management.
Multi-processor POWER5 technology-based servers have multiple autonomic
computing features for higher availability compared with single processor
servers. If a processor is running, but is experiencing a high rate of
correctable soft errors, it can be deconfigured. Its workload can be picked up
automatically by the remaining processor or processors without an IPL. If
there is an unused Capacity Upgrade on Demand processor or if one
processor unit of unused capacity in a shared processor pool is available, the
deconfigured processor can be replaced dynamically by the unused
processor capacity to maintain the same level of available performance.
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Chapter 2. Hardware architecture