National Instruments PC-DIO-96 User Manual page 58

Register-Level Programming
Main() {
#define BASE_ADDRESS
#define APORTAoffset
#define APORTBoffset
#define APORTCoffset
#define ACNFGoffset
#define IREG1offset
#define IREG2offset
unsigned int porta, portb, portc, cnfg, ireg1, ireg2;
char valread;
/* Calculate register addresses */
porta = BASE_ADDRESS + APORTAoffset;
portb = BASE_ADDRESS + APORTBoffset;
portc = BASE_ADDRESS + APORTCoffset;
cnfg = BASE_ADDRESS + ACNFGoffset;
ireg1 = BASE_ADDRESS + IREG1offset;
ireg2 = BASE_ADDRESS + IREG2offset;
/* EXAMPLE 1–Set up interrupts for mode 1 input for port A.
appropriate interrupt bits. */
outp(cnfg,0xB0);
outp(cnfg,0x09);
outp(ireg1,0x01);
outp(ireg2,0x04);
/* EXAMPLE 2–Set up interrupts for mode 1 input for port B.
appropriate interrupt bits. */
outp(cnfg,0x86);
outp(cnfg,0x05);
outp(ireg1,0x02);
outp(ireg2,0x04);
/* EXAMPLE 3–Set up interrupts for mode 1 output for port A.
appropriate interrupt bits. */
outp(cnfg,0xA0);
outp(cnfg,0x0D);
outp(ireg1,0x01);
outp(ireg2,0x04);
/* EXAMPLE 4–Set up interrupts for mode 1 output for port B.
appropriate interrupt bits. */
PC-DIO-96 User Manual
0x180 /* Board located at address 180 */
0x00 /* Offset for PPI A, port A */
0x01 /* Offset for PPI A, port B */
0x02 /* Offset for PPI A, port C */
0x03 /* Offset for PPI A, CNFG */
0x14 /* Offset for Interrupt Reg. 1 */
0x15 /* Offset for Interrupt Reg. 2 */
/* Variable to store data read from a
port */
/* Port A is an input in mode 1. */
/* Set PC4 to enable interrupts from
82C55A. */
/* Set AIRQ0 to enable PPI A, port A
interrupts. */
/* Set INTEN bit. */
/* Port B is an input in mode 1. */
/* Set PC2 to enable interrupts from
82C55A. */
/* Set AIRQ1 to enable PPI A, port B
interrupts. */
/* Set INTEN bit. */
/* Port A is an output in mode 1. */
/* Set PC6 to enable interrupts from
82C55A. */
/* Set AIRQ0 to enable PPI A, port A
interrupts. */
/* Set INTEN bit. */
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Enable the
Enable the
Enable the
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Chapter 4