Interrupt Control Register 2 - National Instruments PC-DIO-96 User Manual

Register-Level Programming

Interrupt Control Register 2

D7 D6
X X
Bit Name
7–3 X
2 INTEN
1 CTRIRQ
0 CTR1
PC-DIO-96 User Manual
D5 D4
X X
Description
Don't Care Bit.
Global Interrupt Enable Bit—If this bit is set, the PC-DIO-96 can
interrupt the host computer. If this bit is cleared, the PC-DIO-96
interrupt line is put into high-impedance mode, so other devices
can use the interrupt channel selected by jumper W1.
Counter Interrupt Enable Bit—If this bit is set, the 8253 counter
outputs can interrupt the host computer. If this bit is cleared, the
counter outputs have no effect.
Counter 1 Enable Bit—If this bit is set, the output from counter 1
of the 8253 is connected to the interrupt request circuitry. In this
mode, counter 0 of the 8253 acts as a frequency scaler for
counter 1, which generates the interrupt. If CTR1 is cleared, the
output from counter 0 of the 8253 is connected to the interrupt
request circuitry. In this mode, counter 0 generates the interrupt.
For more information, see the section later in this chapter on
programming interrupts using the 8253.
4-8
D3 D2
X INTEN CTRIRQ
© National Instruments Corporation
Chapter 4
D1 D0
CTR1