Programming The Digital I/O Circuitry - National Instruments DAQ AT-MIO-16X User Manual

Chapter 5 Programming

Programming the Digital I/O Circuitry

AT-MIO-16X User Manual
Clear Register before exiting the interrupt routine. This clears the
interrupt request. The best method of servicing update requests is with
DMA since this is done in parallel with the PC CPU. If DMA is enabled,
DMA requests are generated when TMRREQ is set. When the DMA
controller acknowledges the request, TMRREQ is automatically
cleared.
An error is indicated in timer waveform generation when the
DACCOMP bit in Status Register 1 is set prematurely. If DACFIFOEF*
is clear when another update occurs, then an error has occurred. This
error indicates an underrun condition, where rates are above the
maximum rate of the DMA controller or interrupt handling capabilities.
The error condition is cleared by writing to the TMRREQ Clear
Register or the DAC Clear Register.
The digital input circuitry is controlled and monitored using the Digital
Input Register, the Digital Output Register, and the two bits DIOPAEN
and DIOPBEN in Command Register 2. See the register bit descriptions
earlier in this chapter for more information.
To enable digital output port A, set the DIOPAEN bit in Command
Register 2. To enable digital output port B, set the DIOPBEN bit in
Command Register 2. When a digital output port is enabled, the
contents of the Digital Output Register are driven onto the digital lines
corresponding to that port. The digital output for both ports A and B are
updated by writing the desired pattern to the Digital Output Register.
In order for an external device to drive the digital I/O lines, the input
ports must be enabled. Clear the DIOPAEN bit in Command Register 2
if an external device is driving digital I/O lines ADIO<3..0>. Clear the
DIOPBEN bit in Command Register 2 if an external device is driving
digital I/O lines BDIO<3..0>. The Digital Input Register can then be
read to monitor the state of the digital I/O lines as driven by the external
device.
The logic state of all eight digital I/O lines can be read from the Digital
Input Register. If the digital output ports are enabled, the Digital Input
Register serves as a read-back register; that is, you can determine how
the AT-MIO-16X is driving the digital I/O lines by reading the Digital
Input Register.
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