Analog Devices EVAL-ADN469xEFDEBZ User Manual
Analog Devices EVAL-ADN469xEFDEBZ User Manual

Analog Devices EVAL-ADN469xEFDEBZ User Manual

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One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 •
High Speed Evaluation Board for Full Duplex M-LVDS Transceivers (ADN4692E,

FEATURES

Easy evaluation of full-duplex M-LVDS transceivers
ADN4692E, ADN4693E, ADN4695E, and
Board layout optimized for high speed signaling
Matched track lengths on M-LVDS input/output differential
pairs, with controlled 50 Ω impedance tracks
SMB jack inputs/outputs for high speed connections
Logic signals: RO, RE, DE, and DI
M-LVDS bus signals: A, B, Y, and Z
Power/ground connections through screw terminal blocks
Jumper selectable enable/disable for RE and DE
Test points for measuring all signals and multiple ground
points to facilitate probing of multiple signals
50 Ω termination resistors across A and B, and Y and Z, to
simulate double-terminated bus

APPLICATIONS

Full-duplex M-LVDS part evaluation

EVALUATION KIT CONTENTS

1 EVAL-ADN469xEFDEBZ

1
ADN4692EBRZ
1
ADN4693EBRZ
1
ADN4695EBRZ
1
ADN4697EBRZ
Table 1. ADN469xE Selection Table
Part No.
Receiver Type
ADN4690E
Type 1
ADN4691E
Type 1
ADN4692E
Type 1
ADN4693E
Type 1
ADN4694E
Type 2
ADN4695E
Type 2
ADN4696E
Type 2
ADN4697E
Type 2
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
ADN4693E, ADN4695E, and ADN4697E)
ADN4697E
Data Rate
Package
100 Mbps
8-lead SOIC
200 Mbps
8-lead SOIC
100 Mbps
14-lead SOIC
200 Mbps
14-lead SOIC
100 Mbps
8-lead SOIC
100 Mbps
14-lead SOIC
200 Mbps
8-lead SOIC
200 Mbps
14-lead SOIC
Rev. 0 | Page 1 of 8
Evaluation Board User Guide
EVAL-ADN469xEFDEBZ

GENERAL DESCRIPTION

The EVAL-ADN469xEFDEBZ allows quick and easy evaluation
of full-duplex M-LVDS transceivers (ADN4692E, ADN4693E,
ADN4695E, and ADN4697E). The evaluation board allows all
of the input and output functions to be exercised without the
need for external components. Screw terminal blocks provide
convenient connections for power and ground, with SMB jack
connectors for high speed logic and M-LVDS bus signals.
The evaluation board has a 14-lead SOIC footprint for a full-duplex
M-LVDS transceiver from the ADN469xE family (see Table 1).
Half-Duplex/Full-Duplex
Half
Half
Full
Full
Half
Full
Half
Full
UG-361
www.analog.com
Figure 1.
Evaluation Board
EVAL-ADN469xEHDEBZ
EVAL-ADN469xEHDEBZ
EVAL-ADN469xEFDEBZ
EVAL-ADN469xEFDEBZ
EVAL-ADN469xEHDEBZ
EVAL-ADN469xEFDEBZ
EVAL-ADN469xEHDEBZ
EVAL-ADN469xEFDEBZ

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Summary of Contents for Analog Devices EVAL-ADN469xEFDEBZ

  • Page 1: Features

    Figure 1. APPLICATIONS GENERAL DESCRIPTION Full-duplex M-LVDS part evaluation The EVAL-ADN469xEFDEBZ allows quick and easy evaluation of full-duplex M-LVDS transceivers (ADN4692E, ADN4693E, EVALUATION KIT CONTENTS ADN4695E, and ADN4697E). The evaluation board allows all 1 EVAL-ADN469xEFDEBZ of the input and output functions to be exercised without the ADN4692EBRZ need for external components.
  • Page 2: Table Of Contents

      Applications..................1 Evaluation with Applications............3     Evaluation Kit Contents..............1 Evaluation Board Schematic and Layout ........5     EVAL-ADN469xEFDEBZ ............... 1 Ordering Information...............8     General Description ................. 1 Bill of Materials................8     Revision History ................2 Related Links..................8...
  • Page 3: Evaluation Board Configuration

    EVALUATION WITH APPLICATIONS be exercised without the need for external components. Jumper Two EVAL-ADN469xEFDEBZ boards can connect together in a configurations are shown in Table 2. point-to-point configuration, as shown in Figure 4. To allow part The board is powered by connecting a 3.3 V power supply to the...
  • Page 4 1. REMOVE 50Ω TERMINATION RESISTORS FROM EVALUATION BOARD. 2. MAXIMUM NUMBER OF NODES: 32. 3. R IS EQUALTO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED. Figure 5. EVAL-ADN469xEFDEBZ Application Evaluation Connected to Bus and Control Board Table 2. Jumper Configuration Link Connection Description Connects RE to VCC (disables receiver output).
  • Page 5: Evaluation Board Schematic And Layout

    EVALUATION BOARD SCHEMATIC AND LAYOUT 0Ω GND8 GND GND1 GND2 GND3 +3.3V +3.3V +3.3V 50Ω 100nF 10µF ADN4692/ ADN4693/ ADN4695/ ADN4697 +3.3V GND4 GND5 GND6 GND7 50Ω Figure 6. EVAL-ADN469xEFDEBZ Schematic Figure 7. EVAL-ADN469xEFDEBZ Silkscreen Rev. 0 | Page 5 of 8...
  • Page 6 UG-361 Evaluation Board User Guide Figure 8. EVAL-ADN469xEFDEBZ Component Side Figure 9. EVAL-ADN469xEFDEBZ Internal Layer 2 Figure 10. EVAL-ADN469xEFDEBZ Internal Layer 3 Rev. 0 | Page 6 of 8...
  • Page 7 Evaluation Board User Guide UG-361 Figure 11. EVAL-ADN469xEFDEBZ Solder Side Rev. 0 | Page 7 of 8...
  • Page 8: Ordering Information

    By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement.

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