Decoder Section - Sony SDP-EP70 Service Manual

SDP-EP70/EP90ES
– DECODER SECTION –
SERIAL COMMUNICATION
FORMAT CONVERTER
IC1006
DIN
DATA
12
BCKI
J
BCK
13
LRCK
LRCK 14
DCK
15
MCK
DA
FS128 16
SECTION
CLOCK
(Page 17)
GENERATOR
LAC3
1
STD
36
SYSYTEM CONTROL
IC1002
P20/A8
55
RESET 1 RESET
I
TX 10 P51/RXD0
CONTROL
P50/TXD0
RX 11
SECTION
(Page 23)
RESET
MD1
4 MD1
FOR
FVPP 7 STBY/FVPP
FLASH
P84/TXD1
TX 78
WRITER
77 P85/RXD1
RX
XTAL EXTAL
2 3
X1001
16MHz
• SIGNAL PATH
: DIGITAL IN
SDIO
9
SCKR
8
GPIO0
4
WSR
3
SCO
41
SC1
30
SC2
37
SRD
26
SCK
38
TXD
42
RXD
43
H0/PB0
24
23
21
19
21
P60
H0 - H7
|
17
28
P67
15
H7/PB7
14
HA0/PB8
7
P43 42
HA0 - HA2
| 6
P45 44
HA2/PB10
4
D1001
P47 46 125
RESET
41 10
P42
HEN/PB12
P41 40 12
HR/W/PB11
14 1
P96/16MHz EXTAL
39
P40 13 HREQ/PB13
P46 45 130 PLOCK
– 21 –
29 35 32 38 31 26 25
33
D0
84
85
87
88
90
91
93
96
100
101
DIGITAL
SIGNAL
103
PROCESSOR
IC1001
104
106
109
111
112
114
115
117
D23
118
RD
47
WR 46
X/Y A0 A13
55 60 61 63 65 68 71 74 76 78 80
A1-A14
D0-D7 A0-A14
S-RAM
IC1003
11 13 15 19 10 3 25 24 21 23 2 26 1
I/00 I/07 A0 A14
OE WE
22 27
D8-D15 A0-A14
S-RAM
IC1004
11 13 15 19 10 3 25 24 21 23 2 26 1
I/00 I/07 A0 A14
OE WE
22 27
D16-D23 A0-A14
S-RAM
IC1005
10 3 25 24 21 23 2 26 1
11 13 15 19
I/00 I/07 A0 A14
OE WE
22 27
– 22 –
SDIO
K
SCKR
GPIO0
WSR
CONTROL
SECTION
(Page 23)