Sony SDP-EP70 Service Manual page 44

Digital surround processor
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• IC423 Digital Signal Processor (SSP424023FJ88)
Pin Name
Pin No.
AGND
1
MCS0
2
MA15/MCS3
3
MA14
4
MA13
5
AVCC
6
MA12
7
AGND
8
QVCC
9
QGND
10
MA11
11
MA10
12
MA9
13
MA8
14
AGND
15
MA7
16
AVCC
17
MA6
18
MA5
19
MA4
20
AGND
21
MA3
22
MA2
23
MA1
24
MA0
25
SCK/SCL
26
EXTAL
27
QVCC
28
QGND
29
PINIT
30
PGND
31
PCAP
32
PVCC
33
SGND
34
MISO/SDA
35
RESET
36
MODA/IRQA
37
MODB/IRQB
38
MODC/NMI
39
SVCC
40
I/O
Address buffer ground
O
Chip select 0 output to S-RAM (Not used)
O
Chip select 3 output to S-RAM
O
Address data output to S-RAM
O
Address bus buffer power supply (+5V)
O
Address data output to S-RAM
Ground for address bus buffer
Power supply for internal logic (+5V)
Ground for internal logic
O
O
Address data output to S-RAM
O
O
Ground for address bus buffer
O
Address data output to S-RAM
Power supply for address bus buffer (+5V)
O
O
Address data output to S-RAM
O
Ground for address bus buffer
O
O
Address data output to S-RAM
O
O
I
SPI serial clock signal input from system controller
I
External frequency input (3 MHz)
Power supply for internal logic (+5V)
Ground for internal logic
I
PLL initialize input (Fixed at "L")
Ground for PLL
PLL filter input (Connected to 0.01 µF capacitor)
I
Power supply for PLL (+5V)
Ground for serial port
I
Master data signal input from system controller
I
Reset signal input from system controller
I
Mode select A (Fixed at "H")
I
Mode select B (Fixed at "L")
I
Mode select C (Fixed at "H")
Power supply for serial port (+5V)
– 59 –
Function

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